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HexRaysSA
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rax
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fix(riscv): enforce execution, CSR, and SMIR constraints
- #231
#231
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19h
merged 8 commits into
fix/riscv-vector-issues-192-196
HexRaysSA/rax:fix/riscv-vector-issues-192-196
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agent/riscv-smir-validation-rollup
HexRaysSA/rax:agent/riscv-smir-validation-rollup
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Aug 12, 2026
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fix(riscv): enforce execution, CSR, and SMIR constraints
#231
19h
merged 8 commits into
fix/riscv-vector-issues-192-196
HexRaysSA/rax:fix/riscv-vector-issues-192-196
from
agent/riscv-smir-validation-rollup
HexRaysSA/rax:agent/riscv-smir-validation-rollup
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Commits
Commits on Aug 11, 2026
fix(riscv): enforce SMIR architectural constraints
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fix(riscv): enforce machine CSR WARL semantics
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fix(riscv): enforce retirement and CSR availability
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fix(riscv): gate compressed double memory ops on D
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fix(riscv): reject illegal instructions at JIT boundary
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fix(riscv): validate failed store-conditional addresses
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fix(riscv): probe failed store-conditionals without access
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fix(riscv): correct Zcmp rlist 5 semantics
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