mspm0: add OPA driver with buffer and non-inverting PGA modes

[ozongzi]

Adds a driver for the OPA on the MSPM0 parts that have one (G150x, G350x, L130x, L134x), scoped to the two modes from our discussion: buffer (TRM 17.2.7.2) and non-inverting PGA (17.2.7.3.2).

The register block comes from mspm0-rs/mspm0-data#37; the second commit bumps mspm0-metapac to the tag generated from it.

let mut opa = Opa::new(p.OPA1, Default::default());
let mut out = opa.pga_ext(p.PB19, p.PA16, Gain::X4);
let raw = adc.read_channel(&out.adc_channel()).await;
out.set_gain(Gain::X16); // auto-ranging

Shape notes:

• _ext drives the OPAx_OUT pin, _int keeps the output internal to the ADC. Both return a handle that exposes the OPA's dedicated internal ADC channel and disable the amplifier on drop.
• The non-inverting input is impl Into<NonInvertingInput>: either an OPAx_INy+ pin (per-role pin traits generated from the metapac pin metadata, so the PSEL channel comes from the pin you pass) or an internal source (dac12(), dac8(), vref(), ground()). IN2+ shares the DAC_OUT pad, which is why it maps to the DAC12 PSEL channel.
• set_gain() works while the amplifier is running, since on this part gain is a single CFG field and runtime ranging is the main thing the stm32 API doesn't allow.
• The OPA-output-to-ADC channel mapping isn't in mspm0-data (G: OPAx→ADCx ch13; L: single ADC, ch12/ch13), so build.rs carries a small per-family table taken from TI's SysConfig ADC12_internalConnections.js — same approach as embassy-stm32's opamp, where the OPAMPx→ADCx channel table lives in the HAL rather than stm32-data. Can move it into mspm0-data later if you'd rather have it as data.
• Chopping is exposed in Config but defaults to off; the doc comment explains the ripple/ADC-averaging interaction.

The first commit is a standalone ADC fix this depends on: read_channel/read_sequence tied the channel's lifetime to the driver's 'd, which rejects a short-lived channel borrowing an OPA output. Can split it into its own PR if you want.

Testing: LP-MSPM0G3507, DAC_OUT (PA15) jumpered to OPA0_IN1+ (PA25). The DAC drives known codes and the OPA outputs are read back through their dedicated internal ADC channels (OPA0→ADC0, OPA1→ADC1, so both instances and both channel mappings are exercised). Each PGA step enters at x2 and is retuned with set_gain(), then verified by two-point slope so offsets stay out of the measurement: x2..x8 through the external pin path on OPA0, x16/x32 through the internal DAC12 route on OPA1. All five gains land within 2% of nominal. Also compile-checked on mspm0l1306 (single-ADC channel mapping) and mspm0c1104 (no OPA, module cfg'd out). Example included under examples/mspm0g3507.

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