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fix(riscv): resume whole-register moves from vstart - #273

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fix(riscv): resume whole-register moves from vstart#273
carlosqwqqwq wants to merge 1 commit into
HexRaysSA:masterfrom
carlosqwqqwq:fix-riscv-vmvr-vstart

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@carlosqwqqwq

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Closes #268

Summary

Every vector instruction, including whole-register moves, begins at the element number given in vstart and leaves earlier destination bytes undisturbed (V spec norm:vstart_op). The affected Op::Vmvr path copied the whole register group from byte 0 regardless of vstart, so a resumable trap sequence (or any nonzero vstart) corrupted the bytes before vstart. QEMU keeps the earlier bytes undisturbed.

The fix changes the Op::Vmvr loop to start at vstart.min(total) instead of 0.

Validation

  • cargo test --lib: the targeted whole-register-move test passes, and the full library test suite passes with no regressions.

No new upstream test files are added; this is a source-only change.

19h commented Aug 13, 2026

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Thanks for the report and patch. I independently validated the whole-register move semantics and reimplemented them in #296, including vstart measured in SEW elements and source snapshots for overlapping groups. The rollup includes your co-author credit and asks for your review. I’m closing this PR as superseded by #296.

@19h 19h closed this Aug 13, 2026
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vmv<nr>r.v whole-register moves ignore vstart

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