fix(riscv): reject viota.m with vd == vs2

[carlosqwqqwq]

Closes #266

Summary

The vector iota instruction (viota.m) reads vs2 element-by-element and writes the running count to vd; the specification reserves the encoding when the destination aliases the source register. The affected Op::Viota path had no vd==vs2 check, so viota.m v2, v2 executed with the destination overwriting the source mid-scan. QEMU raises SIGILL for the same encoding.

The fix adds the vd==vs2 rejection to the Op::Viota branch.

Validation

• cargo test --lib: the targeted viota test passes, and the full library test suite passes with no regressions.

No new upstream test files are added; this is a source-only change.

[19h]

Thanks for the report and patch. The viota.m destination/source overlap case was independently validated, reimplemented, and merged in #255. The new successor rollup #296 records that disposition alongside the remaining RVV work. I’m closing this PR as already superseded by #255; your contribution is credited in the merged rollup.