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20 changes: 9 additions & 11 deletions src/isa/riscv/cpu.rs
Original file line number Diff line number Diff line change
Expand Up @@ -733,7 +733,6 @@ impl RiscVCpu {
| Op::PrefetchI
| Op::PrefetchR
| Op::PrefetchW
| Op::SfenceVm
| Op::SfenceVma
| Op::SinvalVma
| Op::SfenceWInval
Expand Down Expand Up @@ -5254,21 +5253,20 @@ mod tests {
let sys =
|funct7: u32, rs2: u32, rs1: u32| (funct7 << 25) | (rs2 << 20) | (rs1 << 15) | 0x73;
for w in [
sys(0x08, 0x04, 10), // sfence.vm a0
sys(0x09, 11, 10), // sfence.vma a0, a1
sys(0x0b, 11, 10), // sinval.vma a0, a1
sys(0x0c, 0, 0), // sfence.w.inval
sys(0x0c, 1, 0), // sfence.inval.ir
sys(0x11, 11, 10), // hfence.vvma a0, a1
sys(0x13, 11, 10), // hinval.vvma a0, a1
sys(0x31, 11, 10), // hfence.gvma a0, a1
sys(0x33, 11, 10), // hinval.gvma a0, a1
sys(0x09, 11, 10), // sfence.vma a0, a1
sys(0x0b, 11, 10), // sinval.vma a0, a1
sys(0x0c, 0, 0), // sfence.w.inval
sys(0x0c, 1, 0), // sfence.inval.ir
sys(0x11, 11, 10), // hfence.vvma a0, a1
sys(0x13, 11, 10), // hinval.vvma a0, a1
sys(0x31, 11, 10), // hfence.gvma a0, a1
sys(0x33, 11, 10), // hinval.gvma a0, a1
] {
assert_eq!(run_one(&mut c, w), RiscVExit::Continue);
}
assert_eq!(c.x(10), 0x4000);
assert_eq!(c.x(11), 0x22);
assert_eq!(c.pc(), 0x300 + 9 * 4);
assert_eq!(c.pc(), 0x300 + 8 * 4);
}

#[test]
Expand Down
8 changes: 2 additions & 6 deletions src/isa/riscv/decode.rs
Original file line number Diff line number Diff line change
Expand Up @@ -105,7 +105,6 @@ pub enum Op {
WrsNto,
WrsSto,
Uret,
SfenceVm,
SfenceVma,
SinvalVma,
SfenceWInval,
Expand Down Expand Up @@ -2402,7 +2401,6 @@ fn decode_system(w: u32, rv64: bool, isa: &Isa) -> Insn {
0x1d if isa.zawrs => base(Op::WrsSto, w),
_ => Insn::illegal(w, 4),
},
0x08 if rs2(w) == 0x04 => base(Op::SfenceVm, w),
0x08 if rs1(w) == 0 && rs2(w) == 0x02 => base(Op::Sret, w),
0x08 if rs1(w) == 0 && rs2(w) == 0x05 => base(Op::Wfi, w),
0x09 => base(Op::SfenceVma, w),
Expand Down Expand Up @@ -3092,10 +3090,8 @@ mod tests {
decode(sys(0x00, 0x02, 0), Xlen::Rv64, &Isa::rv64gc()).op,
Op::Uret
);
assert_eq!(
decode(sys(0x08, 0x04, 10), Xlen::Rv64, &Isa::rv64gc()).op,
Op::SfenceVm
);
// 0x08/0x04 was the obsolete sfence.vm encoding; must be illegal.
assert!(decode(sys(0x08, 0x04, 10), Xlen::Rv64, &Isa::rv64gc()).is_illegal());
assert_eq!(
decode(sys(0x09, 11, 10), Xlen::Rv64, &Isa::rv64gc()).op,
Op::SfenceVma
Expand Down
16 changes: 2 additions & 14 deletions src/isa/riscv/disasm.rs
Original file line number Diff line number Diff line change
Expand Up @@ -93,7 +93,6 @@ impl Op {
WrsNto => "wrs.nto",
WrsSto => "wrs.sto",
Uret => "uret",
SfenceVm => "sfence.vm",
SfenceVma => "sfence.vma",
SinvalVma => "sinval.vma",
SfenceWInval => "sfence.w.inval",
Expand Down Expand Up @@ -772,7 +771,6 @@ impl Op {
Fence | FenceI | Pause | NtlP1 | NtlPall | NtlS1 | NtlAll | Ecall | Ebreak | Mret
| Sret | Wfi | WrsNto | WrsSto | Uret | SfenceWInval | SfenceInvalIr | H3Block
| H3Unblock => Class::Bare,
SfenceVm => Class::PrivFenceVm,
SfenceVma | HfenceVvma | HfenceGvma => Class::PrivFence,
SinvalVma | HinvalVvma | HinvalGvma => Class::PrivFence2,
HlvB | HlvH | HlvW | HlvD | HlvBu | HlvHu | HlvWu | HlvxHu | HlvxWu => Class::HLoad,
Expand Down Expand Up @@ -860,7 +858,6 @@ enum Class {
RArith,
Unary,
Bare,
PrivFenceVm,
PrivFence,
PrivFence2,
HLoad,
Expand Down Expand Up @@ -932,13 +929,6 @@ impl fmt::Display for Insn {
Class::RArith => write!(f, "{m} {rd}, {rs1}, {rs2}"),
Class::Unary => write!(f, "{m} {rd}, {rs1}"),
Class::Bare => write!(f, "{m}"),
Class::PrivFenceVm => {
if self.rs1 == 0 {
write!(f, "{m}")
} else {
write!(f, "{m} {rs1}")
}
}
Class::PrivFence => {
if self.rs2 == 0 {
if self.rs1 == 0 {
Expand Down Expand Up @@ -1358,10 +1348,8 @@ mod tests {
decode(sys(0x00, 0x02, 0), Xlen::Rv64, &Isa::rv64gc()).to_string(),
"uret"
);
assert_eq!(
decode(sys(0x08, 0x04, 10), Xlen::Rv64, &Isa::rv64gc()).to_string(),
"sfence.vm a0"
);
// 0x08/0x04 was the obsolete sfence.vm encoding; it is now illegal.
assert!(decode(sys(0x08, 0x04, 10), Xlen::Rv64, &Isa::rv64gc()).is_illegal());
assert_eq!(
decode(sys(0x09, 0, 0), Xlen::Rv64, &Isa::rv64gc()).to_string(),
"sfence.vma"
Expand Down
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