Xtensa Port v3.13 Updates

Cadence/Xtensa/Makefile

@@ -30,6 +30,11 @@ ifeq ($(OVERLAY),1)
 OVLYFLAGS   = -DXT_USE_THREAD_SAFE_CLIB=1 -DXT_USE_OVLY=1
 endif
 
+# Build without SMP support
+ifeq ($(SMP),0)
+SMPFLAGS    = -DconfigNUMBER_OF_CORES=1
+endif
+
 SRCROOT     = $(subst /,$(S),$(CURDIR))
 TSTROOT     = $(subst /,$(S),$(abspath $(SRCROOT)$(S)..$(S)..$(S)..$(S)..$(S)..$(S)..$(S)Demo$(S)ThirdParty$(S)Partner-Supported-Demos$(S)Cadence_Xtensa_ISS_xt-clang$(SMALL)))
 BLDROOT     = $(TSTROOT)$(S)build
@@ -79,16 +84,19 @@ endif
 IFLAGS      = \
   -I$(FR_SRCDIR)$(S)include -I$(XT_SRCDIR) -I$(TSTROOT)$(S)common$(S)config_files -I$(BLDDIR)
 
-CSTD        = -std=c99
+CSTD        = -std=c11
 ifeq ($(OVERLAY),1)
 CFLAGS      = -Os -g
 else
 CFLAGS      = -O2 -g
 endif
 WFLAGS      = -Werror -Wall -Wextra
 CFGFLAGS   ?= 
-CCFLAGS     = $(CSTD) $(CFGFLAGS) $(CFLAGS) $(WFLAGS) -mno-coproc -mlongcalls -ffunction-sections -mno-l32r-flix $(DFLAGS) $(MPUFLAGS) $(OVLYFLAGS)
-ASFLAGS     = $(CCFLAGS)
+CCFLAGS     = $(CSTD) $(CFGFLAGS) $(CFLAGS) $(WFLAGS) -mno-coproc -mlongcalls -ffunction-sections -mno-l32r-flix $(DFLAGS) $(MPUFLAGS) $(OVLYFLAGS) $(SMPFLAGS)
+
+# Avoid LTO due to build issues related to inline assembly
+CCFLAGS_F   = $(filter-out -flto,$(CCFLAGS))
+ASFLAGS     = $(CCFLAGS_F)
 
 # File-specific flags
 
@@ -120,12 +128,12 @@ $(OSLIB) : $(LIB_O_LIST)
 	$(AR) -rs $@ $^
 
 $(BLDDIR)/asm-offsets.h : asm-offsets.c $(BLDDIR)/.mkdir
-	$(CC) $(CCFLAGS) $(IFLAGS) -MD -MF $(subst .h,.d,$@) -MT $@ -ffunction-sections -fdata-sections -Wl,--gc-sections -o $@.exe $<
+	$(CC) $(CCFLAGS_F) $(IFLAGS) -MD -MF $(subst .h,.d,$@) -MT $@ -ffunction-sections -fdata-sections -Wl,--gc-sections -o $@.exe $< -lxtutil
 	$(ISS) $@.exe > $@
 	$(RM) $(subst /,$(S),$@.exe)
 
 $(BLDDIR)/%.o : %.c $(BLDDIR)/.mkdir
-	$(CC) $(CCFLAGS) $(IFLAGS) $(FLAGS_$*) -mtext-section-literals -MD -MF $(subst .o,.d,$@) -c -o $@ $<
+	$(CC) $(CCFLAGS_F) $(IFLAGS) $(FLAGS_$*) -mtext-section-literals -MD -MF $(subst .o,.d,$@) -c -o $@ $<
 
 $(BLDDIR)/%.o : %.S $(BLDDIR)/.mkdir
 	$(CC) $(ASFLAGS) $(IFLAGS) $(FLAGS_$*) -MD -MF $(subst .o,.d,$@) -c -o $@ $<

Cadence/Xtensa/asm-offsets.c

@@ -1,5 +1,6 @@
 #include <stddef.h>
 #include <stdio.h>
+
 #include "../../../../../tasks.c"
 
 #define DEFINE(sym,val) \
@@ -18,7 +19,14 @@ int main(void)
 #if ( ( portSTACK_GROWTH > 0 ) || ( configRECORD_STACK_HIGH_ADDRESS == 1 ) )
     DEFINE(TCB_END_OF_STACK_OFF, offsetof(TCB_t, pxEndOfStack));
 #endif
+#if ( ( configUSE_CORE_AFFINITY == 1 ) && ( configNUMBER_OF_CORES > 1 ) )
+    DEFINE(TCB_CORE_AFFINITY_MASK_OFF, offsetof(TCB_t, uxCoreAffinityMask));
+#endif
 #if ( configUSE_C_RUNTIME_TLS_SUPPORT == 1 )
     DEFINE(TCB_IMPURE_PTR_OFF, offsetof(TCB_t, xTLSBlock));
 #endif
+    DEFINE(PORTINT_NEST_OFF, offsetof(xt_internal_data_t, port_interruptNesting));
+    DEFINE(PORTINT_SWITCH_OFF, offsetof(xt_internal_data_t, port_switch_flag));
+    DEFINE(PORTINT_INTENABLE_OFF, offsetof(xt_internal_data_t, xt_intenable));
+    DEFINE(PORTINT_VPRI_MASK_OFF, offsetof(xt_internal_data_t, xt_vpri_mask));
 }

Cadence/Xtensa/mpu.S

@@ -1,6 +1,6 @@
 /*
  * FreeRTOS Kernel <DEVELOPMENT BRANCH>
- * Copyright (C) 2015-2024 Cadence Design Systems, Inc.
+ * Copyright (C) 2015-2025 Cadence Design Systems, Inc.
  * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * SPDX-License-Identifier: MIT
@@ -30,6 +30,7 @@
 #include "xtensa_rtos.h"
 #include "portmacro.h"
 #include "asm-offsets.h"
+#include "xtensa_asm.h"
 
 #include <xtensa/hal.h>
 
@@ -82,7 +83,7 @@ Entry Conditions:
     .align  4
 _xt_mpu_restore:
 
-    movi    A2, pxCurrentTCB
+    pxctcb  A2, A3                      /* pxCurrentTCB or pxCurrentTCBs[] */
     l32i    A2, A2, 0
     beqz    A2, .Lset