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Don't compute FnAbi for LLVM intrinsics #160077
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b095cab
Don't use extern "unadjusted" outside of LLVM intrinsics in tests
bjorn3 176bbd8
Avoid computing FnAbi for llvm intrinsics in miri
bjorn3 0bee31f
Don't compute FnAbi for LLVM intrinsics
bjorn3 98537ee
Require LLVM 22 for const-vector.rs test
bjorn3 0bab389
Fix unpadded-simd test
bjorn3 eacedff
Fix test
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| Original file line number | Diff line number | Diff line change |
|---|---|---|
| @@ -1,4 +1,5 @@ | ||
| //@ revisions: OPT0 OPT0_S390X | ||
| //@ min-llvm-version: 22 | ||
| //@ [OPT0] ignore-s390x | ||
| //@ [OPT0_S390X] only-s390x | ||
| //@ [OPT0] compile-flags: -C no-prepopulate-passes -Copt-level=0 | ||
|
|
@@ -9,6 +10,7 @@ | |
| #![crate_type = "lib"] | ||
| #![feature(abi_unadjusted)] | ||
| #![feature(const_trait_impl)] | ||
| #![feature(link_llvm_intrinsics)] | ||
| #![feature(repr_simd)] | ||
| #![feature(rustc_attrs)] | ||
| #![feature(simd_ffi)] | ||
|
|
@@ -19,63 +21,56 @@ | |
|
|
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| #[path = "../auxiliary/minisimd.rs"] | ||
| mod minisimd; | ||
| use minisimd::{PackedSimd as Simd, f32x2, i8x2}; | ||
| use minisimd::{PackedSimd, Simd, f32x2, i8x2}; | ||
|
|
||
| // The following functions are required for the tests to ensure | ||
| // that they are called with a const vector | ||
|
|
||
| extern "unadjusted" { | ||
| fn test_i8x2(a: i8x2); | ||
| fn test_i8x2_two_args(a: i8x2, b: i8x2); | ||
| fn test_i8x2_mixed_args(a: i8x2, c: i32, b: i8x2); | ||
| fn test_i8x2_arr(a: i8x2); | ||
| fn test_f32x2(a: f32x2); | ||
| fn test_f32x2_arr(a: f32x2); | ||
| fn test_simd(a: Simd<i32, 4>); | ||
| fn test_simd_unaligned(a: Simd<i32, 3>); | ||
|
Member
Author
There was a problem hiding this comment. Choose a reason for hiding this commentThe reason will be displayed to describe this comment to others. Learn more. There is no way to test this specific case anymore it seems. LLVM doesn't accept |
||
| #[link_name = "llvm.vector.reduce.add.v2i8"] | ||
| fn test_i8x2(a: i8x2) -> i8; | ||
| #[link_name = "llvm.vector.partial.reduce.add.v2i8.v2i8.v2i8"] | ||
| fn test_i8x2_two_args(a: i8x2, b: i8x2) -> i8x2; | ||
| #[link_name = "llvm.vector.insert.v2i8.v2i8"] | ||
| fn test_i8x2_mixed_args(a: i8x2, b: i8x2, c: u64) -> i8x2; | ||
| #[link_name = "llvm.vector.reduce.fadd.v2f32"] | ||
| fn test_f32x2(a: f32, b: f32x2) -> f32; | ||
| #[link_name = "llvm.vector.reduce.add.v4i32"] | ||
| fn test_simd4(a: PackedSimd<i32, 4>) -> i32; | ||
| #[link_name = "llvm.vector.reduce.add.v3i32"] | ||
| fn test_simd3(a: Simd<i32, 3>) -> i32; | ||
| } | ||
|
|
||
| // Ensure the packed variant of the simd struct does not become a const vector | ||
| // if the size is not a power of 2 | ||
| // CHECK: %"minisimd::PackedSimd<i32, 3>" = type { [3 x i32] } | ||
|
|
||
| #[cfg_attr(target_family = "wasm", target_feature(enable = "simd128"))] | ||
| #[cfg_attr(target_arch = "arm", target_feature(enable = "neon"))] | ||
| #[cfg_attr(target_arch = "x86", target_feature(enable = "sse"))] | ||
| #[cfg_attr(target_arch = "mips", target_feature(enable = "msa"))] | ||
| #[cfg_attr(target_arch = "riscv64", target_feature(enable = "v"))] | ||
| pub fn do_call() { | ||
| unsafe { | ||
| // CHECK: call void @test_i8x2(<2 x i8> <i8 32, i8 64> | ||
| // CHECK: call i8 @llvm.vector.reduce.add.v2i8(<2 x i8> <i8 32, i8 64> | ||
| test_i8x2(const { i8x2::from_array([32, 64]) }); | ||
|
|
||
| // CHECK: call void @test_i8x2_two_args(<2 x i8> <i8 32, i8 64>, <2 x i8> <i8 8, i8 16> | ||
| // CHECK: call <2 x i8> @llvm.vector.partial.reduce.add.v2i8.v2i8(<2 x i8> <i8 32, i8 64>, <2 x i8> <i8 8, i8 16>) | ||
| test_i8x2_two_args( | ||
| const { i8x2::from_array([32, 64]) }, | ||
| const { i8x2::from_array([8, 16]) }, | ||
| ); | ||
|
|
||
| // CHECK: call void @test_i8x2_mixed_args(<2 x i8> <i8 32, i8 64>, i32 43, <2 x i8> <i8 8, i8 16> | ||
| // CHECK: call <2 x i8> @llvm.vector.insert.v2i8.v2i8(<2 x i8> <i8 32, i8 64>, <2 x i8> <i8 8, i8 16>, i64 0 | ||
| test_i8x2_mixed_args( | ||
| const { i8x2::from_array([32, 64]) }, | ||
| 43, | ||
| const { i8x2::from_array([8, 16]) }, | ||
| 0, | ||
| ); | ||
|
|
||
| // CHECK: call void @test_i8x2_arr(<2 x i8> <i8 32, i8 64> | ||
| test_i8x2_arr(const { i8x2::from_array([32, 64]) }); | ||
|
|
||
| // CHECK: call void @test_f32x2(<2 x float> <float {{0x3FD47AE140000000|3.200000e-01}}, float {{0x3FE47AE140000000|6.400000e-01}}> | ||
| test_f32x2(const { f32x2::from_array([0.32, 0.64]) }); | ||
|
|
||
| // CHECK: void @test_f32x2_arr(<2 x float> <float {{0x3FD47AE140000000|3.200000e-01}}, float {{0x3FE47AE140000000|6.400000e-01}}> | ||
| test_f32x2_arr(const { f32x2::from_array([0.32, 0.64]) }); | ||
| // CHECK: call float @llvm.vector.reduce.fadd.v2f32(float 0.000000e+00, <2 x float> <float 0x3FD47AE140000000, float 0x3FE47AE140000000> | ||
| test_f32x2(0.0, const { f32x2::from_array([0.32, 0.64]) }); | ||
|
|
||
| // CHECK: call void @test_simd(<4 x i32> <i32 2, i32 4, i32 6, i32 8> | ||
| test_simd(const { Simd::<i32, 4>([2, 4, 6, 8]) }); | ||
| // CHECK: call i32 @llvm.vector.reduce.add.v4i32(<4 x i32> <i32 2, i32 4, i32 6, i32 8> | ||
| test_simd4(const { PackedSimd::<i32, 4>([2, 4, 6, 8]) }); | ||
|
|
||
| // CHECK: [[UNALIGNED_ARG:%.*]] = load %"minisimd::PackedSimd<i32, 3>", ptr @anon{{.*}} | ||
| // CHECK-NEXT: call void @test_simd_unaligned(%"minisimd::PackedSimd<i32, 3>" [[UNALIGNED_ARG]] | ||
| test_simd_unaligned(const { Simd::<i32, 3>([2, 4, 6]) }); | ||
| // CHECK: call i32 @llvm.vector.reduce.add.v3i32(<3 x i32> <i32 2, i32 4, i32 6> | ||
| test_simd3(const { Simd::<i32, 3>([2, 4, 6]) }); | ||
| } | ||
| } | ||
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This introduces redundancy (
funcandcalleeconceptually contain the same data). So I am not a fan of this.What's the rationale for these non-trivial interpreter changes? I would understand making the
fn_abifield anOptionfor calls that don't need an ABI, but this goes much beyond that it seems, by entirely removingfn_abi(andfn_sig).View changes since the review
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I could replace the
funcfield with just theTy. Makingfn_abioptional would mean I did have to match on theinstanceinsideeval_callee_and_argsand do an unwrap outside of it. I can do it if you prefer it that way.Uh oh!
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That would be better, albeit still a bit odd.
Well I don't even know yet why you need to change all those other things. I could reverse engineer it from your PR but it'd be easier if you just explained it to me.