ionic: Add PTP Hardware Clock (PHC) timestamping support

kernel-headers/rdma/ib_user_verbs.h

@@ -1379,4 +1379,37 @@ enum ib_uverbs_raw_packet_caps {
 	IB_UVERBS_RAW_PACKET_CAP_DELAY_DROP = 1 << 3,
 };
 
+/*
+ * struct ib_uverbs_clock_info - timecounter state shared with userspace
+ *
+ * Drivers that use a software timecounter over a free-running hardware
+ * cycle counter can map this page read-only into userspace, allowing
+ * conversion of hardware timestamps to system time without a syscall.
+ *
+ * Synchronization uses a sequence counter (@sign): the kernel sets bit 0
+ * before updating, then advances by 2 after. Userspace must retry the read
+ * if @sign is odd or changed during the read.
+ *
+ * @sign:            Sequence counter (bit 0 = update in progress)
+ * @resv:            Reserved
+ * @nsec:            Nanoseconds at last update
+ * @cycles:          Cycle counter value at last update
+ * @frac:            Fractional nanoseconds at last update
+ * @mult:            Cycle-to-nanosecond multiplier
+ * @shift:           Cycle-to-nanosecond shift
+ * @mask:            Cycle counter bitmask
+ * @overflow_period: Max interval (nsec) between reads before counter wraps
+ */
+struct ib_uverbs_clock_info {
+	__u32 sign;
+	__u32 resv;
+	__aligned_u64 nsec;
+	__aligned_u64 cycles;
+	__aligned_u64 frac;
+	__u32 mult;
+	__u32 shift;
+	__aligned_u64 mask;
+	__aligned_u64 overflow_period;
+};
+
 #endif /* IB_USER_VERBS_H */

kernel-headers/rdma/ionic-abi.h

@@ -48,6 +48,7 @@ struct ionic_ctx_resp {
 	__u8 expdb_qtypes;
 
 	__u8 rsvd2[3];
+	__aligned_u64 phc_offset;
 };
 
 struct ionic_qdesc {

kernel-headers/rdma/mlx5-abi.h

@@ -472,17 +472,10 @@ struct mlx5_ib_modify_wq {
 	__u32	reserved;
 };
 
-struct mlx5_ib_clock_info {
-	__u32 sign;
-	__u32 resv;
-	__aligned_u64 nsec;
-	__aligned_u64 cycles;
-	__aligned_u64 frac;
-	__u32 mult;
-	__u32 shift;
-	__aligned_u64 mask;
-	__aligned_u64 overflow_period;
-};
+/*
+ * deprecated, see struct ib_uverbs_clock_info from ib_user_verbs.h
+ */
+#define mlx5_ib_clock_info ib_uverbs_clock_info
 
 enum mlx5_ib_mmap_cmd {
 	MLX5_IB_MMAP_REGULAR_PAGE               = 0,

providers/ionic/ionic.c

@@ -5,6 +5,7 @@
 
 #include <stdio.h>
 #include <stdlib.h>
+#include <sys/mman.h>
 
 #include "ionic.h"
 
@@ -86,6 +87,16 @@ static struct verbs_context *ionic_alloc_context(struct ibv_device *ibdev,
 	}
 	ctx->dbpage = ctx->dbpage_page + (resp.dbell_offset & mask);
 
+	if (resp.phc_offset) {
+		ctx->phc_state = mmap(NULL, IONIC_PAGE_SIZE, PROT_READ, MAP_SHARED,
+				      cmd_fd, resp.phc_offset);
+		if (ctx->phc_state == MAP_FAILED) {
+			ctx->phc_state = NULL;
+			rc = errno;
+			goto err_phc;
+		}
+	}
+
 	pthread_mutex_init(&ctx->mut, NULL);
 	ionic_tbl_init(&ctx->qp_tbl);
 
@@ -98,6 +109,8 @@ static struct verbs_context *ionic_alloc_context(struct ibv_device *ibdev,
 	verbs_debug(&ctx->vctx, "Attached to ctx %p", ctx);
 	return &ctx->vctx;
 
+err_phc:
+	ionic_unmap(ctx->dbpage_page, 1u << ctx->pg_shift);
 err_cmd:
 	verbs_uninit_context(&ctx->vctx);
 err_ctx:

providers/ionic/ionic.h

@@ -54,7 +54,9 @@ enum {
 	    IBV_WC_EX_WITH_SRC_QP         |
 	    IBV_WC_EX_WITH_SLID           |
 	    IBV_WC_EX_WITH_SL             |
-	    IBV_WC_EX_WITH_DLID_PATH_BITS
+	    IBV_WC_EX_WITH_DLID_PATH_BITS |
+	    IBV_WC_EX_WITH_COMPLETION_TIMESTAMP |
+	    IBV_WC_EX_WITH_COMPLETION_TIMESTAMP_WALLCLOCK
 };
 
 enum {
@@ -103,6 +105,7 @@ struct ionic_ctx {
 
 	void			*dbpage_page;
 	uint64_t		*dbpage;
+	struct ib_uverbs_clock_info	*phc_state;
 
 	pthread_mutex_t		mut;
 	struct ionic_tbl_root	qp_tbl;
@@ -142,6 +145,7 @@ struct ionic_cq {
 	struct list_head	poll_sq;
 	struct list_head	poll_rq;
 	bool			flush;
+	bool			do_timestamp;
 	struct list_head	flush_sq;
 	struct list_head	flush_rq;
 	struct ionic_queue	q;
@@ -153,18 +157,33 @@ struct ionic_cq {
 	int			reserve_pending;
 	uint16_t		arm_any_prod;
 	uint16_t		arm_sol_prod;
+	uint64_t		phc_tick;
+};
+
+struct ionic_phc {
+	uint64_t		mask;
+	uint64_t		cycles;
+	uint64_t		nsec;
+	uint64_t		frac;
+	uint32_t		mult;
+	uint32_t		shift;
 };
 
 struct ionic_vcq {
 	struct verbs_cq		vcq;
 	struct ionic_cq		cq[2];
 	uint8_t			udma_mask;
 	uint8_t			poll_idx;
+	bool			phc_update;
+	bool			cur_wc_pending;
 	struct ibv_wc		cur_wc; /* for use with start_poll/next_poll */
+	uint64_t		cur_wc_timestamp;
+	struct ionic_phc	phc;
 };
 
 struct ionic_sq_meta {
 	uint64_t		wrid;
+	uint64_t		cqe_timestamp;
 	uint32_t		len;
 	uint16_t		seq;
 	uint8_t			ibop;

providers/ionic/ionic_fw_types.h

@@ -74,7 +74,7 @@ union ionic_v1_pld {
 struct ionic_v1_cqe {
 	union {
 		struct {
-			__le64		wqe_idx;
+			__le64		wqe_idx_timestamp;
 			__be32		src_qpn_op;
 			__u8		src_mac[6];
 			__be16		vlan_tag;
@@ -84,16 +84,17 @@ struct ionic_v1_cqe {
 			__u8		rsvd[4];
 			__be32		msg_msn;
 			__u8		rsvd2[8];
-			__le64		npg_wqe_idx;
+			__le64		npg_wqe_idx_timestamp;
 		} send;
 	};
 	__be32				status_length;
 	__be32				qid_type_flags;
 };
 
-/* bits for cqe wqe_idx */
-enum ionic_v1_cqe_wqe_idx_bits {
+/* bits for cqe wqe_idx and timestamp */
+enum ionic_v1_cqe_wqe_idx_timestamp_bits {
 	IONIC_V1_CQE_WQE_IDX_MASK	= 0xffff,
+	IONIC_V1_CQE_TIMESTAMP_SHIFT	= 16,
 };
 
 /* bits for cqe recv */