Add MCXA577 eSPI device support#6516
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Bump the fork pin to the mcxa577-espi-pac branch, which adds the MCXA577 eSPI register block generated from the SVD (curated per the metapac workflow, all 205 fields cross-checked against the SDK PERI_ESPI.h) on top of the USBHS registers from embassy-rs/nxp-pac#108.
Port the MCUX SDK fsl_espi driver to the embassy model: the IRQ-callback architecture becomes an async Espi::wait_event() loop delivering bus and per-port events (bus reset, virtual wires, Port 80, GPIO wires, mailbox, OOB, SAF flash requests), with synchronous response operations. Register access goes through the generated nxp-pac eSPI block; the peripheral clock is routed through the standard clock helpers (EspiConfig), with typed pins for both the PORT4/ALT11 (FRDM-MCXA577) and PORT3/ALT5 pin sets. The interrupt handler OR-latches only independent single-bit status flags and keeps the multi-bit RDSTAT/WRSTAT state by overwrite so coalesced interrupts cannot fabricate request types; latched-status registers are consumed clear-before-read. Mailbox/flash payloads live in an application-owned 4 KiB EspiRam window guarded by a D-cache debug-assert and dma_clean/dma_invalidate porting hooks. The espi_device example replicates the SDK test bench used with the Promira eSPI host: the same five-port layout, 256-byte virtual slave-attached flash with split read completions, and the same serial console commands on the FRDM debug UART so espi_autotest.py and espi_generator.py can drive it. Verified on FRDM-MCXA577: boots, capability readback matches the programmed configuration bit-for-bit, and the console commands respond; full protocol testing requires the Promira bench.
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Adds an eSPI target (device) driver for the MCXA577, plus an
espi_deviceexample replicating the MCUX SDK eSPI test bench.Stacked on #6382 — the first 13 commits here are that PR (USB device support); only the last two commits (
Pin nxp-pac with MCXA577 eSPI registers,Add MCXA577 eSPI device support) are new. Reviewing commit-by-commit is recommended until #6382 merges, after which this rebases to just the eSPI commits.Also depends on the MCXA577 eSPI register block added to the nxp-pac fork (embassy-rs/nxp-pac#111, stacked on embassy-rs/nxp-pac#108); the pin bump commit documents the switch-to-upstream plan.
Driver
Port of the MCUX SDK
fsl_espidriver to the embassy model: the SDK's IRQ-callback architecture becomes an asyncEspi::wait_event()loop delivering bus and per-port events (bus reset, virtual wires, GPIO wires, Port 80, mailbox, OOB, SAF flash requests), with synchronous response operations, semantic virtual-wire helpers (sci()/smi()/wake()/pme()/boot_done()/suspend_ack()/...), and host-visible status block (STATADDR) configuration.Register access goes through the generated nxp-pac eSPI block only; the peripheral clock is routed through the standard clock helpers (
EspiConfig), with typed pins for the PORT4/ALT11 (FRDM-MCXA577) and PORT3/ALT5 pin sets.Where the IPs overlap, the API deliberately parallels embassy-imxrt's
espi.rs. Deliberate divergences:EspiRam(4 KiB window) with a D-cache debug-assert anddma_clean/dma_invalidateporting hooks, instead of a rawram_baseaddress;VWireBusyerror instead of busy-waiting on WIREWO.DONE;Validation (FRDM-MCXA577 + TotalPhase Promira host/analyzer bench)
Full eSPI protocol suite: 38/38 pass (12 analyzer bus tests incl. VWire get/put, IRQ push, OOB both directions, SAF erase/write/read with split completions, Port 80, endpoint, index/data, mailbox; 8 serial tests; 18 console tests), matching the SDK reference bench. Capability readback (
ESPICAP) verified bit-exact against the programmed configuration. The device also negotiates and runs traffic in dual/quad IO and at 66 MHz (serial-verified suite passes in those modes).🤖 Generated with Claude Code