Carry-save-adder circuit generation

[maartenboersma]

Summary

For efficient many-term addition, a tree starting with a carry-save adder is typically a good implementation choice.

Although modern logic synthesizers may automatically select an adder tree implementation, in our experience is it helpful to start synthesis with a netlist that already has the desired structure. It helps not only for the result quality, but also for the result stability.

This pull request introduces a Csa (Carry Save Adder) function to reduce an arbitrary number of UInt input terms to two UInt output terms. The sum of the two output terms is equal to the sum of the input terms.

Release Notes

Addition of a Carry Save Adder function to reduce many input terms to two.

[adkian-sifive]

Please add tests