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shim_test: enable on VE2 and update the coverage for VE2#1499

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bisingha-xilinx:ve2-enable-shim-test
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shim_test: enable on VE2 and update the coverage for VE2#1499
bisingha-xilinx wants to merge 1 commit into
amd:mainfrom
bisingha-xilinx:ve2-enable-shim-test

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@bisingha-xilinx bisingha-xilinx commented Jul 16, 2026

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This PR has following changes:

Wire up test/shim_test for the XDNA_VE2 edge so the shim
harness runs on VE2 alongside the existing platforms

  • Added a new query to get the device id
  • Added the ve2 device id (0xb052) in shim_test and its
    vadd/nop/bad_timeout binaries
  • Added cmake changes to build test/ on VE2 with
    -DXDNA_BUILD_SHIM_TEST=ON

Make the shim_test suite run cleanly on VE2 (device id npu_ve2
0xb052) by grouping each test's device filter in actual hw
behaviour instead of the aie/aie4 grouping.

  • Added is_npu_ve2 plus dev filter helpers
  • Excluded npu_ve2 from tests VE2 doesnt support yet
  • Enabled multi context, auto-suspend/resume on VE2
  • Splitted huge page bo test: kept 5GB for other aie devices
    and 3GB for npu_ve2, since VE2 has smaller CMA pool (4GB only)

Copilot AI review requested due to automatic review settings July 16, 2026 06:57

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Pull request overview

Enables and stabilizes test/shim_test execution on the VE2 (npu3b, 0xb052) edge build by extending device identification/queries, adding VE2-specific test binaries, and refining device filters so unsupported tests are excluded.

Changes:

  • Add VE2/npu3b device ID handling and VE2-specific shim_test ELF binaries.
  • Introduce VE2-specific device filter helpers to align tests with actual HW capabilities and adjust a large-BO test size for VE2 CMA constraints.
  • Add VE2 query wiring (pcie device id + vendor) and CMake switches to optionally build shim_test on VE2 while excluding xrt_test.

Reviewed changes

Copilot reviewed 7 out of 7 changed files in this pull request and generated 3 comments.

Show a summary per file
File Description
test/shim_test/shim_test.cpp Adds npu3b-aware device filtering and adjusts/enables specific tests for VE2 behavior/limits.
test/shim_test/dev_info.h Adds the npu3b PCIe device ID constant (0xb052).
test/shim_test/dev_info.cpp Adds VE2/npu3b-specific FULL_ELF binaries (good/nop/bad_timeout) to the shim_test binary registry.
test/CMakeLists.txt Builds shim_test on all builds that include test/, and gates xrt_test off for VE2.
src/shim_ve2/xdna_hwq.cpp Adds bounded retry/backoff for VE2 command submission when the host queue is full.
src/shim_ve2/xdna_device.cpp Adds VE2 query handlers for PCIe device ID and vendor ID (sysfs).
CMake/native.cmake Adds an opt-in XDNA_SHIM_TEST build path for VE2 to include test/ and set needed XRT submodule vars.

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Comment thread CMake/native.cmake Outdated
Comment thread src/shim_ve2/xdna_hwq.cpp Outdated
Comment thread src/shim_ve2/xdna_device.cpp Outdated
Enable test/shim_test on the XDNA_VE2 edge (device 0xb052, aie2ps) and
align each test's device filter with real VE2 hardware behaviour.

- Add pcie_device/pcie_vendor VE2 shim queries and the VE2 device id
- Name the device npu_ve2 in shim_test and its full-ELF data path
- Add is_npu_ve2 + dev filter helpers; exclude tests VE2 lacks
- Enable multi-context and auto-suspend/resume; split the huge-page BO
  test to 3GB on VE2 (smaller CMA pool of 4GB)
- Gate the shim_test build behind -DXDNA_BUILD_SHIM_TEST and add cmake
  wiring to build test/ on VE2

Signed-off-by: Bikash Singha <bikash.singha@amd.com>
Copilot AI review requested due to automatic review settings July 16, 2026 16:29

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Pull request overview

Copilot reviewed 6 out of 6 changed files in this pull request and generated 1 comment.

Comment thread CMake/native.cmake
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2 participants