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Add timer system state snapshot APIs - #1462

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Zepp-Hanzj:agent/timer-system-state
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Add timer system state snapshot APIs#1462
Zepp-Hanzj wants to merge 1 commit into
FreeRTOS:mainfrom
Zepp-Hanzj:agent/timer-system-state

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@Zepp-Hanzj

@Zepp-Hanzj Zepp-Hanzj commented Jul 31, 2026

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Description

Add a development-time snapshot API for software timers, analogous to the existing task system-state API:

  • Add TimerStatus_t, uxTimerGetNumberOfTimers(), and uxTimerGetSystemState() when configUSE_TRACE_FACILITY == 1.
  • Track both active and inactive timers in an internal trace-only registry from creation until deletion.
  • Return each timer's handle, name, period, next expiry, ID, active state, and auto-reload state.
  • Suspend the scheduler while copying the registry so callers receive a consistent best-effort snapshot.
  • Add trace entry/return hooks and preserve StaticTimer_t size compatibility with the internal timer structure.

The snapshot API is intended for diagnostics. Timer commands still waiting in the timer command queue are intentionally not reflected, and returned handles/pointers are borrowed. There is no added per-timer cost when configUSE_TRACE_FACILITY == 0; trace-enabled builds add one link pointer per timer.

Test Steps

  1. Enable configUSE_TRACE_FACILITY and create active/inactive, auto-reload/one-shot, dynamic/static timers.
  2. Call uxTimerGetNumberOfTimers() and uxTimerGetSystemState() before scheduler start and while the scheduler is running.
  3. Verify period changes, stop/restart, expiry across tick rollover, dynamic/static deletion, and too-small/NULL output buffers.
  4. Run concurrent snapshots while repeatedly creating, starting, stopping, and deleting timers under a 10 kHz hardware interrupt load.

Validation

Target validation used an STM32F407ZGT6 with the GCC/ARM_CM4F port, HSE 8 MHz, SYSCLK 168 MHz, and TIM2 at 10 kHz.

  • All 7 directed functional cases passed, including pre-scheduler use, dynamic/static lifecycle, tick rollover, one-shot expiry, and invalid-buffer handling.
  • The one-hour stress run completed 3,599,939 snapshots and 720,000 create/delete cycles while servicing 36,781,109 TIM2 interrupts.
  • created == deleted, the registry returned to 4 base timers, free heap remained 39,304 bytes, BASEPRI remained zero, and the accumulated error count remained zero.
  • Snapshot latency was 337-3,012 CPU cycles (approximately 2.0-17.9 us at 168 MHz).
  • Final result: FINAL PASS sec=3600 ... errors=0.
  • The firmware was rebuilt from clean state with arm-none-eabi-gcc; ELF symbols, interrupt vector placement, and scheduler suspend/resume calls were also checked.
  • git diff --check passed.

The full UART log will be added separately in a PR comment.

Checklist:

  • I have tested my changes.
  • I have modified and/or added unit tests to cover the code changes in this Pull Request.

Related Issue

Closes #1313.

By submitting this pull request, I confirm that you can use, modify, copy, and redistribute this contribution, under the terms of your choice.

@sonarqubecloud

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@Zepp-Hanzj

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FreeRtos_test_TimerSnapShot.txt
Serial Port Log Here

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[Feature Request] Snapshot Of All Timers API

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