Add explanatory comment for portFPU_REG_OFFSET in RISC-V port - #1457
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wanghengZzz wants to merge 2 commits into
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Add explanatory comment for portFPU_REG_OFFSET in RISC-V port#1457wanghengZzz wants to merge 2 commits into
wanghengZzz wants to merge 2 commits into
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Explain that the initial (2 * portWORD_SIZE) offset reserves space for the fcsr register and maintains proper memory and ABI stack alignment for both RV32 and RV64 architectures.
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Description
Clarify FPU context offset calculation in RISC-V portContext.h
This PR adds an explanatory comment to
portFPU_REG_OFFSET()inportContext.hfor the RISC-V port to improve code readability andmaintainability.
The macro
portFPU_REG_OFFSET( regIndex )uses( 2 * portWORD_SIZE )as the base offset for saving floating-point registers. Without
documentation, the purpose of this offset is not immediately obvious to
developers reading the porting code.
The
( 2 * portWORD_SIZE )reservation serves two purposes:portWORD_SIZEslot for the Floating-PointControl and Status Register (
fcsr).portWORD_SIZEslot to align the FP registers:Checklist:
in this Pull Request.
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