From 6fdb62334efb1602dab1b96afb1022c54c335149 Mon Sep 17 00:00:00 2001 From: ChipSec Date: Thu, 27 Aug 2026 12:12:16 -0700 Subject: [PATCH] Update to release/2.0.8 Signed-off-by: ChipSec --- _sources/index.rst.txt | 4 +- .../chipsec.cfg.parsers.hob_parser.rst.txt | 7 + .../chipsec.cfg.parsers.ip.hob.rst.txt | 7 + .../modules/chipsec.cfg.parsers.ip.rst.txt | 1 + .../chipsec.cfg.parsers.registers.hob.rst.txt | 7 + .../chipsec.cfg.parsers.registers.rst.txt | 1 + .../modules/chipsec.hal.common.hob.rst.txt | 7 + _sources/modules/chipsec.hal.common.rst.txt | 1 + .../modules/chipsec.utilcmd.hob_cmd.rst.txt | 7 + _sources/modules/chipsec.utilcmd.rst.txt | 1 + contribution/code-style-python.html | 12 +- contribution/sphinx.html | 2 +- development/Architecture-Overview.html | 4 +- development/Configuration-Files.html | 12 +- development/Developing.html | 10 +- development/OS-Helpers-and-Drivers.html | 4 +- development/Platform-Detection.html | 2 +- development/Sample-Module-Code.html | 14 +- development/Sample-Util-Command.html | 12 +- .../Vulnerabilities-and-CHIPSEC-Modules.html | 2 +- genindex.html | 60 +++++- index.html | 12 +- installation/InstallLinux.html | 2 +- installation/InstallWinDAL.html | 2 +- installation/InstallWindows.html | 2 +- installation/USBwithUEFIShell.html | 2 +- modules/chipsec.cfg.8086.adl.xml.html | 2 +- modules/chipsec.cfg.8086.arl.xml.html | 2 +- modules/chipsec.cfg.8086.arlh.xml.html | 2 +- modules/chipsec.cfg.8086.html | 2 +- modules/chipsec.cfg.8086.kbl.xml.html | 2 +- modules/chipsec.cfg.8086.kbl_orig.xmls.html | 2 +- modules/chipsec.cfg.8086.lnl.xml.html | 2 +- modules/chipsec.cfg.8086.mtl.xml.html | 2 +- .../chipsec.cfg.8086.pch_3xxlp_orig.xmls.html | 2 +- modules/chipsec.cfg.8086.pch_5xxlp.xml.html | 2 +- modules/chipsec.cfg.8086.pch_6xxp.xml.html | 2 +- modules/chipsec.cfg.8086.pch_7xx.xml.html | 2 +- modules/chipsec.cfg.8086.pch_7xxOP.xml.html | 2 +- modules/chipsec.cfg.8086.pch_8xx.xml.html | 2 +- modules/chipsec.cfg.8086.pmc_i440fx.xml.html | 2 +- modules/chipsec.cfg.8086.q35.xml.html | 2 +- modules/chipsec.cfg.8086.rpl.xml.html | 2 +- modules/chipsec.cfg.8086.tglu.xml.html | 2 +- modules/chipsec.cfg.parsers.controls.html | 2 +- ...hipsec.cfg.parsers.core_parser_helper.html | 2 +- modules/chipsec.cfg.parsers.hob_parser.html | 160 +++++++++++++++ modules/chipsec.cfg.parsers.iommu_parser.html | 2 +- modules/chipsec.cfg.parsers.ip.generic.html | 2 +- modules/chipsec.cfg.parsers.ip.hob.html | 133 ++++++++++++ modules/chipsec.cfg.parsers.ip.html | 3 +- modules/chipsec.cfg.parsers.ip.io.html | 2 +- modules/chipsec.cfg.parsers.ip.iobar.html | 2 +- modules/chipsec.cfg.parsers.ip.memory.html | 2 +- modules/chipsec.cfg.parsers.ip.mm_msgbus.html | 2 +- modules/chipsec.cfg.parsers.ip.mmio_bar.html | 2 +- modules/chipsec.cfg.parsers.ip.msgbus.html | 2 +- modules/chipsec.cfg.parsers.ip.msr.html | 2 +- .../chipsec.cfg.parsers.ip.pci_device.html | 2 +- modules/chipsec.cfg.parsers.ip.platform.html | 2 +- modules/chipsec.cfg.parsers.locks.html | 2 +- ...hipsec.cfg.parsers.registers.controls.html | 2 +- .../chipsec.cfg.parsers.registers.hob.html | 145 ++++++++++++++ modules/chipsec.cfg.parsers.registers.html | 3 +- modules/chipsec.cfg.parsers.registers.io.html | 2 +- .../chipsec.cfg.parsers.registers.iobar.html | 2 +- .../chipsec.cfg.parsers.registers.locks.html | 2 +- .../chipsec.cfg.parsers.registers.memory.html | 2 +- ...ipsec.cfg.parsers.registers.mm_msgbus.html | 2 +- .../chipsec.cfg.parsers.registers.mmcfg.html | 2 +- .../chipsec.cfg.parsers.registers.mmio.html | 2 +- .../chipsec.cfg.parsers.registers.msgbus.html | 2 +- .../chipsec.cfg.parsers.registers.msr.html | 2 +- .../chipsec.cfg.parsers.registers.pci.html | 2 +- .../chipsec.cfg.parsers.registers.simple.html | 2 +- modules/chipsec.fuzzing.html | 2 +- modules/chipsec.fuzzing.primitives.html | 2 +- modules/chipsec.hal.amd.cpu.html | 2 +- modules/chipsec.hal.amd.html | 2 +- modules/chipsec.hal.amd.psp.html | 2 +- modules/chipsec.hal.common.acpi.html | 2 +- modules/chipsec.hal.common.cmos.html | 2 +- modules/chipsec.hal.common.cpuid.html | 2 +- modules/chipsec.hal.common.ec.html | 12 +- modules/chipsec.hal.common.hob.html | 163 +++++++++++++++ modules/chipsec.hal.common.html | 3 +- modules/chipsec.hal.common.interrupts.html | 12 +- modules/chipsec.hal.common.io.html | 2 +- modules/chipsec.hal.common.iobar.html | 2 +- modules/chipsec.hal.common.iommu.html | 2 +- modules/chipsec.hal.common.locks.html | 2 +- modules/chipsec.hal.common.memrange.html | 2 +- modules/chipsec.hal.common.mmio.html | 14 +- modules/chipsec.hal.common.msr.html | 2 +- modules/chipsec.hal.common.pci.html | 2 +- modules/chipsec.hal.common.physmem.html | 2 +- modules/chipsec.hal.common.smbios.html | 2 +- modules/chipsec.hal.common.smbus.html | 2 +- modules/chipsec.hal.common.spd.html | 2 +- modules/chipsec.hal.common.tpm.html | 2 +- modules/chipsec.hal.common.uefi.html | 2 +- modules/chipsec.hal.common.virtmem.html | 2 +- modules/chipsec.hal.common.vmm.html | 2 +- modules/chipsec.hal.hal_base.html | 2 +- modules/chipsec.hal.hals.html | 2 +- modules/chipsec.hal.html | 3 +- modules/chipsec.hal.intel.cpu.html | 2 +- modules/chipsec.hal.intel.html | 2 +- modules/chipsec.hal.intel.igd.html | 2 +- modules/chipsec.hal.intel.mm_msgbus.html | 2 +- modules/chipsec.hal.intel.mmcfg.html | 2 +- modules/chipsec.hal.intel.msgbus.html | 2 +- modules/chipsec.hal.intel.spi.html | 2 +- modules/chipsec.hal.intel.spi_descriptor.html | 2 +- modules/chipsec.hal.intel.ucode.html | 6 +- modules/chipsec.helper.basehelper.html | 2 +- modules/chipsec.helper.dal.dalhelper.html | 2 +- modules/chipsec.helper.dal.html | 2 +- modules/chipsec.helper.efi.efihelper.html | 2 +- modules/chipsec.helper.efi.html | 2 +- modules/chipsec.helper.html | 2 +- modules/chipsec.helper.linux.html | 2 +- modules/chipsec.helper.linux.linuxhelper.html | 2 +- modules/chipsec.helper.linuxnative.cpuid.html | 2 +- modules/chipsec.helper.linuxnative.html | 2 +- ...chipsec.helper.linuxnative.legacy_pci.html | 2 +- ....helper.linuxnative.linuxnativehelper.html | 2 +- modules/chipsec.helper.nonehelper.html | 2 +- modules/chipsec.helper.oshelper.html | 2 +- modules/chipsec.helper.record.html | 2 +- .../chipsec.helper.record.recordhelper.html | 2 +- modules/chipsec.helper.replay.html | 2 +- .../chipsec.helper.replay.replayhelper.html | 2 +- modules/chipsec.helper.windows.html | 2 +- .../chipsec.helper.windows.windowshelper.html | 2 +- modules/chipsec.library.acpi_aml_parser.html | 2 +- modules/chipsec.library.acpi_tables.html | 2 +- modules/chipsec.library.cpu.html | 2 +- modules/chipsec.library.display.html | 2 +- modules/chipsec.library.gil.html | 2 +- modules/chipsec.library.intel.html | 2 +- modules/chipsec.library.intel.spi.html | 2 +- ...sec.library.intel.spi_descriptor_cfgs.html | 2 +- modules/chipsec.library.intel.vmm_common.html | 2 +- modules/chipsec.library.paging.html | 2 +- modules/chipsec.library.pci.html | 2 +- modules/chipsec.library.pcidb.html | 2 +- ...hipsec.library.registers.baseregister.html | 2 +- modules/chipsec.library.registers.html | 2 +- modules/chipsec.library.registers.io.html | 2 +- modules/chipsec.library.registers.iobar.html | 2 +- modules/chipsec.library.registers.memory.html | 2 +- .../chipsec.library.registers.mm_msgbus.html | 2 +- modules/chipsec.library.registers.mmcfg.html | 2 +- modules/chipsec.library.registers.mmio.html | 2 +- modules/chipsec.library.registers.msgbus.html | 2 +- modules/chipsec.library.registers.msr.html | 2 +- modules/chipsec.library.registers.pcicfg.html | 2 +- modules/chipsec.library.spi_jedec_ids.html | 2 +- modules/chipsec.library.tpm12_commands.html | 2 +- modules/chipsec.library.tpm_eventlog.html | 2 +- modules/chipsec.library.uefi.common.html | 2 +- modules/chipsec.library.uefi.compression.html | 2 +- modules/chipsec.library.uefi.fv.html | 2 +- modules/chipsec.library.uefi.hob.html | 2 +- modules/chipsec.library.uefi.html | 2 +- modules/chipsec.library.uefi.platform.html | 2 +- modules/chipsec.library.uefi.search.html | 2 +- .../chipsec.library.uefi.sleep_states.html | 2 +- modules/chipsec.library.uefi.spi.html | 2 +- modules/chipsec.library.uefi.variables.html | 2 +- modules/chipsec.library.uefi.varstore.html | 2 +- modules/chipsec.modules.bdw.html | 2 +- modules/chipsec.modules.byt.html | 2 +- ...ipsec.modules.common.bios_kbrd_buffer.html | 2 +- modules/chipsec.modules.common.bios_smi.html | 2 +- modules/chipsec.modules.common.bios_ts.html | 2 +- modules/chipsec.modules.common.bios_wp.html | 2 +- modules/chipsec.modules.common.cet.html | 2 +- .../chipsec.modules.common.cpu.cpu_info.html | 2 +- modules/chipsec.modules.common.cpu.html | 2 +- ...ipsec.modules.common.cpu.ia_untrusted.html | 2 +- ...chipsec.modules.common.cpu.spectre_v2.html | 2 +- .../chipsec.modules.common.debugenabled.html | 2 +- .../chipsec.modules.common.firmware_info.html | 2 +- modules/chipsec.modules.common.html | 2 +- modules/chipsec.modules.common.ia32cfg.html | 2 +- .../chipsec.modules.common.me_mfg_mode.html | 8 +- modules/chipsec.modules.common.memconfig.html | 2 +- modules/chipsec.modules.common.memlock.html | 2 +- modules/chipsec.modules.common.remap.html | 2 +- modules/chipsec.modules.common.rom_armor.html | 2 +- modules/chipsec.modules.common.rtclock.html | 2 +- .../chipsec.modules.common.secureboot.html | 2 +- ...c.modules.common.secureboot.variables.html | 2 +- modules/chipsec.modules.common.sgx_check.html | 2 +- ...sec.modules.common.sgx_check_sidekick.html | 2 +- modules/chipsec.modules.common.smm.html | 2 +- modules/chipsec.modules.common.smm_addr.html | 2 +- modules/chipsec.modules.common.smm_close.html | 2 +- .../chipsec.modules.common.smm_code_chk.html | 2 +- modules/chipsec.modules.common.smm_dma.html | 2 +- modules/chipsec.modules.common.smm_lock.html | 2 +- modules/chipsec.modules.common.smrr.html | 2 +- modules/chipsec.modules.common.spd_wd.html | 2 +- .../chipsec.modules.common.spi_access.html | 2 +- modules/chipsec.modules.common.spi_desc.html | 2 +- .../chipsec.modules.common.spi_fdopss.html | 2 +- modules/chipsec.modules.common.spi_lock.html | 2 +- ...c.modules.common.uefi.access_uefispec.html | 2 +- modules/chipsec.modules.common.uefi.html | 2 +- ...psec.modules.common.uefi.s3bootscript.html | 2 +- modules/chipsec.modules.html | 2 +- modules/chipsec.modules.tools.cpu.html | 2 +- .../chipsec.modules.tools.cpu.sinkhole.html | 2 +- modules/chipsec.modules.tools.html | 2 +- modules/chipsec.modules.tools.secureboot.html | 2 +- .../chipsec.modules.tools.secureboot.te.html | 2 +- modules/chipsec.modules.tools.smm.html | 2 +- ...psec.modules.tools.smm.rogue_mmio_bar.html | 2 +- .../chipsec.modules.tools.smm.smm_ptr.html | 2 +- modules/chipsec.modules.tools.uefi.html | 2 +- ...chipsec.modules.tools.uefi.reputation.html | 2 +- ...ec.modules.tools.uefi.s3script_modify.html | 2 +- ...ipsec.modules.tools.uefi.scan_blocked.html | 2 +- ...chipsec.modules.tools.uefi.scan_image.html | 60 +++++- ...ipsec.modules.tools.uefi.uefivar_fuzz.html | 2 +- .../chipsec.modules.tools.vmm.cpuid_fuzz.html | 2 +- .../chipsec.modules.tools.vmm.ept_finder.html | 2 +- modules/chipsec.modules.tools.vmm.html | 2 +- .../chipsec.modules.tools.vmm.hv.define.html | 2 +- modules/chipsec.modules.tools.vmm.hv.html | 2 +- ...hipsec.modules.tools.vmm.hv.hypercall.html | 2 +- ...ec.modules.tools.vmm.hv.hypercallfuzz.html | 2 +- ...hipsec.modules.tools.vmm.hv.synth_dev.html | 2 +- ...hipsec.modules.tools.vmm.hv.synth_kbd.html | 2 +- .../chipsec.modules.tools.vmm.hv.vmbus.html | 2 +- ...hipsec.modules.tools.vmm.hv.vmbusfuzz.html | 2 +- ...ipsec.modules.tools.vmm.hypercallfuzz.html | 2 +- modules/chipsec.modules.tools.vmm.iofuzz.html | 2 +- .../chipsec.modules.tools.vmm.msr_fuzz.html | 2 +- .../chipsec.modules.tools.vmm.pcie_fuzz.html | 2 +- ...c.modules.tools.vmm.pcie_overlap_fuzz.html | 2 +- modules/chipsec.modules.tools.vmm.vbox.html | 2 +- ...es.tools.vmm.vbox.vbox_crash_apicbase.html | 2 +- modules/chipsec.modules.tools.vmm.venom.html | 2 +- .../chipsec.modules.tools.vmm.xen.define.html | 2 +- modules/chipsec.modules.tools.vmm.xen.html | 2 +- ...ipsec.modules.tools.vmm.xen.hypercall.html | 2 +- ...c.modules.tools.vmm.xen.hypercallfuzz.html | 2 +- .../chipsec.modules.tools.vmm.xen.xsa188.html | 2 +- modules/chipsec.modules.tools.wsmt.html | 2 +- modules/chipsec.testcase.html | 2 +- modules/chipsec.utilcmd.acpi_cmd.html | 2 +- modules/chipsec.utilcmd.chipset_cmd.html | 2 +- modules/chipsec.utilcmd.cmos_cmd.html | 2 +- modules/chipsec.utilcmd.config_cmd.html | 2 +- modules/chipsec.utilcmd.cpu_cmd.html | 2 +- modules/chipsec.utilcmd.decode_cmd.html | 2 +- modules/chipsec.utilcmd.deltas_cmd.html | 2 +- modules/chipsec.utilcmd.desc_cmd.html | 2 +- modules/chipsec.utilcmd.ec_cmd.html | 2 +- modules/chipsec.utilcmd.hals_cmd.html | 12 +- modules/chipsec.utilcmd.hob_cmd.html | 189 ++++++++++++++++++ modules/chipsec.utilcmd.html | 3 +- modules/chipsec.utilcmd.igd_cmd.html | 12 +- modules/chipsec.utilcmd.interrupts_cmd.html | 2 +- modules/chipsec.utilcmd.io_cmd.html | 2 +- modules/chipsec.utilcmd.iommu_cmd.html | 2 +- modules/chipsec.utilcmd.lock_check_cmd.html | 2 +- modules/chipsec.utilcmd.mem_cmd.html | 2 +- modules/chipsec.utilcmd.mm_msgbus_cmd.html | 2 +- modules/chipsec.utilcmd.mmcfg_base_cmd.html | 2 +- modules/chipsec.utilcmd.mmcfg_cmd.html | 2 +- modules/chipsec.utilcmd.mmio_cmd.html | 2 +- modules/chipsec.utilcmd.module_id_cmd.html | 2 +- modules/chipsec.utilcmd.msgbus_cmd.html | 2 +- modules/chipsec.utilcmd.msr_cmd.html | 2 +- modules/chipsec.utilcmd.pci_cmd.html | 2 +- modules/chipsec.utilcmd.reg_cmd.html | 2 +- modules/chipsec.utilcmd.smbios_cmd.html | 2 +- modules/chipsec.utilcmd.smbus_cmd.html | 2 +- modules/chipsec.utilcmd.spd_cmd.html | 2 +- modules/chipsec.utilcmd.spi_cmd.html | 2 +- modules/chipsec.utilcmd.spidesc_cmd.html | 2 +- modules/chipsec.utilcmd.tpm_cmd.html | 2 +- modules/chipsec.utilcmd.txt_cmd.html | 2 +- modules/chipsec.utilcmd.ucode_cmd.html | 2 +- modules/chipsec.utilcmd.uefi_cmd.html | 6 +- modules/chipsec.utilcmd.vmem_cmd.html | 2 +- modules/chipsec.utilcmd.vmm_cmd.html | 2 +- objects.inv | Bin 6091 -> 6181 bytes py-modindex.html | 32 ++- search.html | 2 +- searchindex.js | 2 +- start/Contact.html | 10 +- start/Download.html | 2 +- usage/Interpreting-Results.html | 2 +- usage/Running-Chipsec.html | 22 +- usage/Windows-Exceptions.html | 24 +-- 300 files changed, 1351 insertions(+), 381 deletions(-) create mode 100644 _sources/modules/chipsec.cfg.parsers.hob_parser.rst.txt create mode 100644 _sources/modules/chipsec.cfg.parsers.ip.hob.rst.txt create mode 100644 _sources/modules/chipsec.cfg.parsers.registers.hob.rst.txt create mode 100644 _sources/modules/chipsec.hal.common.hob.rst.txt create mode 100644 _sources/modules/chipsec.utilcmd.hob_cmd.rst.txt create mode 100644 modules/chipsec.cfg.parsers.hob_parser.html create mode 100644 modules/chipsec.cfg.parsers.ip.hob.html create mode 100644 modules/chipsec.cfg.parsers.registers.hob.html create mode 100644 modules/chipsec.hal.common.hob.html create mode 100644 modules/chipsec.utilcmd.hob_cmd.html diff --git a/_sources/index.rst.txt b/_sources/index.rst.txt index ba71ee8e..d6848acc 100644 --- a/_sources/index.rst.txt +++ b/_sources/index.rst.txt @@ -1,9 +1,9 @@ -.. CHIPSEC 2.0.7 documentation file, created by +.. CHIPSEC 2.0.8 documentation file, created by sphinx-quickstart on Wed Mar 25 13:24:44 2015. You can adapt this file completely to your liking, but it should at least contain the root `toctree` directive. -CHIPSEC 2.0.7 +CHIPSEC 2.0.8 ============= CHIPSEC is a framework for analyzing platform level security of diff --git a/_sources/modules/chipsec.cfg.parsers.hob_parser.rst.txt b/_sources/modules/chipsec.cfg.parsers.hob_parser.rst.txt new file mode 100644 index 00000000..8f9fa2b0 --- /dev/null +++ b/_sources/modules/chipsec.cfg.parsers.hob_parser.rst.txt @@ -0,0 +1,7 @@ +chipsec.cfg.parsers.hob\_parser module +====================================== + +.. automodule:: chipsec.cfg.parsers.hob_parser + + + diff --git a/_sources/modules/chipsec.cfg.parsers.ip.hob.rst.txt b/_sources/modules/chipsec.cfg.parsers.ip.hob.rst.txt new file mode 100644 index 00000000..2538d75f --- /dev/null +++ b/_sources/modules/chipsec.cfg.parsers.ip.hob.rst.txt @@ -0,0 +1,7 @@ +chipsec.cfg.parsers.ip.hob module +================================= + +.. automodule:: chipsec.cfg.parsers.ip.hob + + + diff --git a/_sources/modules/chipsec.cfg.parsers.ip.rst.txt b/_sources/modules/chipsec.cfg.parsers.ip.rst.txt index ad78cd66..9b1faa1c 100644 --- a/_sources/modules/chipsec.cfg.parsers.ip.rst.txt +++ b/_sources/modules/chipsec.cfg.parsers.ip.rst.txt @@ -5,6 +5,7 @@ chipsec.cfg.parsers.ip package :maxdepth: 10 chipsec.cfg.parsers.ip.generic + chipsec.cfg.parsers.ip.hob chipsec.cfg.parsers.ip.io chipsec.cfg.parsers.ip.iobar chipsec.cfg.parsers.ip.memory diff --git a/_sources/modules/chipsec.cfg.parsers.registers.hob.rst.txt b/_sources/modules/chipsec.cfg.parsers.registers.hob.rst.txt new file mode 100644 index 00000000..bb569c2e --- /dev/null +++ b/_sources/modules/chipsec.cfg.parsers.registers.hob.rst.txt @@ -0,0 +1,7 @@ +chipsec.cfg.parsers.registers.hob module +======================================== + +.. automodule:: chipsec.cfg.parsers.registers.hob + + + diff --git a/_sources/modules/chipsec.cfg.parsers.registers.rst.txt b/_sources/modules/chipsec.cfg.parsers.registers.rst.txt index fae24336..11f9173d 100644 --- a/_sources/modules/chipsec.cfg.parsers.registers.rst.txt +++ b/_sources/modules/chipsec.cfg.parsers.registers.rst.txt @@ -5,6 +5,7 @@ chipsec.cfg.parsers.registers package :maxdepth: 10 chipsec.cfg.parsers.registers.controls + chipsec.cfg.parsers.registers.hob chipsec.cfg.parsers.registers.io chipsec.cfg.parsers.registers.iobar chipsec.cfg.parsers.registers.locks diff --git a/_sources/modules/chipsec.hal.common.hob.rst.txt b/_sources/modules/chipsec.hal.common.hob.rst.txt new file mode 100644 index 00000000..35db4d02 --- /dev/null +++ b/_sources/modules/chipsec.hal.common.hob.rst.txt @@ -0,0 +1,7 @@ +chipsec.hal.common.hob module +============================= + +.. automodule:: chipsec.hal.common.hob + + + diff --git a/_sources/modules/chipsec.hal.common.rst.txt b/_sources/modules/chipsec.hal.common.rst.txt index 9be63121..3af11c19 100644 --- a/_sources/modules/chipsec.hal.common.rst.txt +++ b/_sources/modules/chipsec.hal.common.rst.txt @@ -8,6 +8,7 @@ chipsec.hal.common package chipsec.hal.common.cmos chipsec.hal.common.cpuid chipsec.hal.common.ec + chipsec.hal.common.hob chipsec.hal.common.interrupts chipsec.hal.common.io chipsec.hal.common.iobar diff --git a/_sources/modules/chipsec.utilcmd.hob_cmd.rst.txt b/_sources/modules/chipsec.utilcmd.hob_cmd.rst.txt new file mode 100644 index 00000000..e44bd421 --- /dev/null +++ b/_sources/modules/chipsec.utilcmd.hob_cmd.rst.txt @@ -0,0 +1,7 @@ +chipsec.utilcmd.hob\_cmd module +=============================== + +.. automodule:: chipsec.utilcmd.hob_cmd + + + diff --git a/_sources/modules/chipsec.utilcmd.rst.txt b/_sources/modules/chipsec.utilcmd.rst.txt index 869582f3..3ed081ff 100644 --- a/_sources/modules/chipsec.utilcmd.rst.txt +++ b/_sources/modules/chipsec.utilcmd.rst.txt @@ -14,6 +14,7 @@ chipsec.utilcmd package chipsec.utilcmd.desc_cmd chipsec.utilcmd.ec_cmd chipsec.utilcmd.hals_cmd + chipsec.utilcmd.hob_cmd chipsec.utilcmd.igd_cmd chipsec.utilcmd.interrupts_cmd chipsec.utilcmd.io_cmd diff --git a/contribution/code-style-python.html b/contribution/code-style-python.html index a4a4906f..19668ca5 100644 --- a/contribution/code-style-python.html +++ b/contribution/code-style-python.html @@ -86,10 +86,10 @@

Python Coding Style Guide
'This is a preferred "string".'
-"Also an acceptable 'string'."
+
'This is a preferred "string".'
+"Also an acceptable 'string'."
 
-"Avoid making this \"string\"."
+"Avoid making this \"string\"."
@@ -110,7 +110,7 @@

Python Coding Style Guidefrom chipsec.module_common import BaseModule from chipsec.library.returncode import ModuleResult -# Bad - using '*' and importing sys after local imports +# Bad - using '*' and importing sys after local imports import * from chipsec.module_common import * import sys @@ -203,7 +203,7 @@

Python Coding Style Guide
"""String description docstring."""
+
"""String description docstring."""
@@ -617,7 +617,7 @@

Navigation

 diff --git a/contribution/sphinx.html b/contribution/sphinx.html index 353283ac..8321c9f2 100644 --- a/contribution/sphinx.html +++ b/contribution/sphinx.html @@ -157,7 +157,7 @@

Navigation

diff --git a/development/Architecture-Overview.html b/development/Architecture-Overview.html index 6c0e306c..006cd9c9 100644 --- a/development/Architecture-Overview.html +++ b/development/Architecture-Overview.html @@ -126,6 +126,7 @@

Commands
  • chipsec.utilcmd.desc_cmd module
  • chipsec.utilcmd.ec_cmd module
  • chipsec.utilcmd.hals_cmd module
    • +
  • chipsec.utilcmd.hob_cmd module
  • chipsec.utilcmd.igd_cmd module
  • chipsec.utilcmd.interrupts_cmd module
  • chipsec.utilcmd.io_cmd module
    • @@ -173,6 +174,7 @@

    HAL (Hardware Abstraction Layer)chipsec.hal.common.cmos module
  • chipsec.hal.common.cpuid module
  • chipsec.hal.common.ec module
    • +
  • chipsec.hal.common.hob module
  • chipsec.hal.common.interrupts module
  • chipsec.hal.common.io module
  • chipsec.hal.common.iobar module
    • @@ -368,7 +370,7 @@

    Navigation

    diff --git a/development/Configuration-Files.html b/development/Configuration-Files.html index 15682c64..25852b73 100644 --- a/development/Configuration-Files.html +++ b/development/Configuration-Files.html @@ -69,17 +69,17 @@

    Navigation

    Configuration File Example

    <mmio>
-<bar name="SPIBAR" bus="0" dev="0x1F" fun="5" reg="0x10" width="4" mask="0xFFFFF000" size="0x1000" desc="SPI Controller Register Range" offset="0x0"/>
+<bar name="SPIBAR" bus="0" dev="0x1F" fun="5" reg="0x10" width="4" mask="0xFFFFF000" size="0x1000" desc="SPI Controller Register Range" offset="0x0"/>
 </mmio>
 <registers>
-<register name="BC" type="pcicfg" bus="0" dev="0x1F" fun="5" offset="0xDC" size="4" desc="BIOS Control">
-<field name="BIOSWE" bit="0" size="1" desc="BIOS Write Enable" />
+<register name="BC" type="pcicfg" bus="0" dev="0x1F" fun="5" offset="0xDC" size="4" desc="BIOS Control">
+<field name="BIOSWE" bit="0" size="1" desc="BIOS Write Enable" />
 …
-<field name="BILD" bit="7" size="1" desc="BIOS Interface Lock Down"/>
+<field name="BILD" bit="7" size="1" desc="BIOS Interface Lock Down"/>
 </register>
 </registers>
 <controls>
-<control name="BiosInterfaceLockDown" register="BC" field="BILD" desc="BIOS Interface Lock-Down"/>
+<control name="BiosInterfaceLockDown" register="BC" field="BILD" desc="BIOS Interface Lock-Down"/>
 </controls>
    @@ -208,7 +208,7 @@

    Navigation

    diff --git a/development/Developing.html b/development/Developing.html index 9f874eb8..1568bb99 100644 --- a/development/Developing.html +++ b/development/Developing.html @@ -51,20 +51,20 @@

    Writing Your Own Modules

  • Define the control in the platform XML file (in chipsec/cfg):

    -
    <control name="BiosLockEnable"     register="BC"    field="BLE"    desc="BIOS Lock Enable"/>
+
    <control name="BiosLockEnable"     register="BC"    field="BLE"    desc="BIOS Lock Enable"/>

  • Get the current status of the control:

    -
    ble = self.cs.control.get_list_by_name('BiosLockEnable').is_all_value(1)
+
    ble = self.cs.control.get_list_by_name('BiosLockEnable').is_all_value(1)

  • React based on the status of the control:

    if ble:
-    self.logger.log_passed("BIOS Lock is set.")
+    self.logger.log_passed("BIOS Lock is set.")
 else:
-    self.logger.log_failed("BIOS Lock is not set.")
+    self.logger.log_failed("BIOS Lock is not set.")
    • @@ -193,7 +193,7 @@

    Navigation

     diff --git a/development/OS-Helpers-and-Drivers.html b/development/OS-Helpers-and-Drivers.html index c316803c..61e1cebf 100644 --- a/development/OS-Helpers-and-Drivers.html +++ b/development/OS-Helpers-and-Drivers.html @@ -67,7 +67,7 @@

    Exampledef __init__(self): super(NewHelper, self).__init__() - self.name = "NewHelper" + self.name = "NewHelper"

    @@ -192,7 +192,7 @@

    Navigation

     diff --git a/development/Platform-Detection.html b/development/Platform-Detection.html index 8e462607..0987c20b 100644 --- a/development/Platform-Detection.html +++ b/development/Platform-Detection.html @@ -164,7 +164,7 @@

    Navigation

    diff --git a/development/Sample-Module-Code.html b/development/Sample-Module-Code.html index 6ef97459..ea171c57 100644 --- a/development/Sample-Module-Code.html +++ b/development/Sample-Module-Code.html @@ -50,25 +50,25 @@

    Sample module code templatefrom chipsec.library.returncode import ModuleResult class ModuleClass(BaseModule): - """Class name aligns with file name, eg ModuleClass.py""" + """Class name aligns with file name, eg ModuleClass.py""" def __init__(self): BaseModule.__init__(self) def is_supported(self) -> bool: - """Module prerequisite checks""" + """Module prerequisite checks""" if some_module_requirement(): return True # Module is applicable self.res = ModuleResult.NOTAPPLICABLE return False # Module is not applicable def action(self) -> int: - """Module test logic and methods as needed""" - self.logger.log_passed('Module was successful!') + """Module test logic and methods as needed""" + self.logger.log_passed('Module was successful!') return ModuleResult.PASSED def run(self, module_argv) -> int: - """Primary module execution and result handling""" - self.logger.start_test('Module Description') + """Primary module execution and result handling""" + self.logger.start_test('Module Description') self.res = self.action() return self.res @@ -173,7 +173,7 @@

    Navigation

     diff --git a/development/Sample-Util-Command.html b/development/Sample-Util-Command.html index 3649651e..783ba326 100644 --- a/development/Sample-Util-Command.html +++ b/development/Sample-Util-Command.html @@ -54,16 +54,16 @@

    Util Commandfrom chipsec.command import BaseCommand, toLoad class CommandClass(BaseCommand): - """ + """ >>> chipsec_util command_display_name action - """ + """ def requirements(self) -> toLoad: return toLoad.All def parse_arguments(self): - parser = ArgumentParser(prog='chipsec_util command_display_name', usage=CommandClass.__doc__) + parser = ArgumentParser(prog='chipsec_util command_display_name', usage=CommandClass.__doc__) subparsers = parser.add_subparsers() - parser_entrypoint = subparsers.add_parser('action') + parser_entrypoint = subparsers.add_parser('action') parser_entrypoint.set_defaults(func=self.action) parser.parse_args(self.argv, namespace=self) @@ -73,7 +73,7 @@

    Util Commanddef run(self): self.func() -commands = {'command_display_name': CommandClass} +commands = {'command_display_name': CommandClass} @@ -176,7 +176,7 @@

    Navigation

     diff --git a/development/Vulnerabilities-and-CHIPSEC-Modules.html b/development/Vulnerabilities-and-CHIPSEC-Modules.html index 87212fac..6fcc50fa 100644 --- a/development/Vulnerabilities-and-CHIPSEC-Modules.html +++ b/development/Vulnerabilities-and-CHIPSEC-Modules.html @@ -653,7 +653,7 @@

    Navigation

    diff --git a/genindex.html b/genindex.html index 8abf2f28..9e28fa7c 100644 --- a/genindex.html +++ b/genindex.html @@ -58,6 +58,13 @@

    C

    +
  • + chipsec.cfg.parsers.hob_parser + +
  • @@ -79,6 +86,13 @@

    C

    • +
  • + chipsec.cfg.parsers.ip.hob + +
  • @@ -163,6 +177,13 @@

    C

    • +
  • + chipsec.cfg.parsers.registers.hob + +
  • @@ -317,6 +338,13 @@

    C

    • +
  • + chipsec.hal.common.hob + +
  • @@ -858,6 +886,8 @@

    C

  • module
    • + + - - diff --git a/index.html b/index.html index ddae0973..06aefb02 100644 --- a/index.html +++ b/index.html @@ -5,7 +5,7 @@ - CHIPSEC 2.0.7 — CHIPSEC documentation + CHIPSEC 2.0.8 — CHIPSEC documentation @@ -31,7 +31,7 @@

    Navigation

    next |
  • CHIPSEC documentation »
    • -
  • CHIPSEC 2.0.7
    • +
  • CHIPSEC 2.0.8
    • @@ -40,8 +40,8 @@

    Navigation

    -
    -

    CHIPSEC 2.0.7

    +
    +

    CHIPSEC 2.0.8

    CHIPSEC is a framework for analyzing platform level security of hardware, devices, system firmware, low-level protection mechanisms, and the configuration of various platform components.

    @@ -229,11 +229,11 @@

    Navigation

    next |
  • CHIPSEC documentation »
    • -
  • CHIPSEC 2.0.7
    • +
  • CHIPSEC 2.0.8
    • diff --git a/installation/InstallLinux.html b/installation/InstallLinux.html index cb48c6b1..65cac977 100644 --- a/installation/InstallLinux.html +++ b/installation/InstallLinux.html @@ -226,7 +226,7 @@

    Navigation

    diff --git a/installation/InstallWinDAL.html b/installation/InstallWinDAL.html index 08ed17ec..c84282b7 100644 --- a/installation/InstallWinDAL.html +++ b/installation/InstallWinDAL.html @@ -164,7 +164,7 @@

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    diff --git a/installation/InstallWindows.html b/installation/InstallWindows.html index 2f33ef1c..28e88e76 100644 --- a/installation/InstallWindows.html +++ b/installation/InstallWindows.html @@ -424,7 +424,7 @@

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    diff --git a/modules/chipsec.cfg.8086.html b/modules/chipsec.cfg.8086.html index 524f339b..c46ab9af 100644 --- a/modules/chipsec.cfg.8086.html +++ b/modules/chipsec.cfg.8086.html @@ -166,7 +166,7 @@

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    diff --git a/modules/chipsec.cfg.8086.kbl.xml.html b/modules/chipsec.cfg.8086.kbl.xml.html index 0c391f27..425764e5 100644 --- a/modules/chipsec.cfg.8086.kbl.xml.html +++ b/modules/chipsec.cfg.8086.kbl.xml.html @@ -154,7 +154,7 @@

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    diff --git a/modules/chipsec.cfg.8086.kbl_orig.xmls.html b/modules/chipsec.cfg.8086.kbl_orig.xmls.html index 3dcb00d8..6e479edf 100644 --- a/modules/chipsec.cfg.8086.kbl_orig.xmls.html +++ b/modules/chipsec.cfg.8086.kbl_orig.xmls.html @@ -157,7 +157,7 @@

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    diff --git a/modules/chipsec.cfg.8086.lnl.xml.html b/modules/chipsec.cfg.8086.lnl.xml.html index a21226f2..efceacab 100644 --- a/modules/chipsec.cfg.8086.lnl.xml.html +++ b/modules/chipsec.cfg.8086.lnl.xml.html @@ -154,7 +154,7 @@

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    diff --git a/modules/chipsec.cfg.8086.mtl.xml.html b/modules/chipsec.cfg.8086.mtl.xml.html index d93f207e..79beff90 100644 --- a/modules/chipsec.cfg.8086.mtl.xml.html +++ b/modules/chipsec.cfg.8086.mtl.xml.html @@ -154,7 +154,7 @@

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    diff --git a/modules/chipsec.cfg.8086.pch_3xxlp_orig.xmls.html b/modules/chipsec.cfg.8086.pch_3xxlp_orig.xmls.html index 6895e969..bd9330ba 100644 --- a/modules/chipsec.cfg.8086.pch_3xxlp_orig.xmls.html +++ b/modules/chipsec.cfg.8086.pch_3xxlp_orig.xmls.html @@ -154,7 +154,7 @@

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    diff --git a/modules/chipsec.cfg.8086.rpl.xml.html b/modules/chipsec.cfg.8086.rpl.xml.html index 7cf28104..1e6d7978 100644 --- a/modules/chipsec.cfg.8086.rpl.xml.html +++ b/modules/chipsec.cfg.8086.rpl.xml.html @@ -165,7 +165,7 @@

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    diff --git a/modules/chipsec.cfg.8086.tglu.xml.html b/modules/chipsec.cfg.8086.tglu.xml.html index 1ffd5354..43098010 100644 --- a/modules/chipsec.cfg.8086.tglu.xml.html +++ b/modules/chipsec.cfg.8086.tglu.xml.html @@ -165,7 +165,7 @@

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    diff --git a/modules/chipsec.cfg.parsers.controls.html b/modules/chipsec.cfg.parsers.controls.html index 2aad896e..316ed966 100644 --- a/modules/chipsec.cfg.parsers.controls.html +++ b/modules/chipsec.cfg.parsers.controls.html @@ -125,7 +125,7 @@

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    diff --git a/modules/chipsec.cfg.parsers.core_parser_helper.html b/modules/chipsec.cfg.parsers.core_parser_helper.html index 73a586ad..abf68c1f 100644 --- a/modules/chipsec.cfg.parsers.core_parser_helper.html +++ b/modules/chipsec.cfg.parsers.core_parser_helper.html @@ -125,7 +125,7 @@

    Navigation

    diff --git a/modules/chipsec.cfg.parsers.hob_parser.html b/modules/chipsec.cfg.parsers.hob_parser.html new file mode 100644 index 00000000..cae0afb7 --- /dev/null +++ b/modules/chipsec.cfg.parsers.hob_parser.html @@ -0,0 +1,160 @@ + + + + + + + + chipsec.cfg.parsers.hob_parser module — CHIPSEC documentation + + + + + + + + + + + + + +
    +
    +
    +
    + +
    +

    chipsec.cfg.parsers.hob_parser module

    +

    HOB definition parser - describes the payload of GUID extension HOBs in XML

    +

    A platform configuration file pulls in HOB definitions the same way it pulls in +other definitions, naming the IP node that will hold them:

    +
    +
    +
    <hob>

    <definition name=”HOB” config=”HOB.hob0.xml” />

    +
    +
    +

    </hob>

    +
    +

    The included file declares one <structure> element per known GUID extension HOB, +with a <field> element per member of the corresponding C structure, in declaration +order:

    +
    +
    +
    <hob>
    +
    <structure name=”PEI_PCD_DATABASE” guid=”EA296D92-0B69-423C-8C28-33B4E0A91268”>

    <field name=”Signature” type=”guid” desc=”PcdDataBaseGuid” /> +<field name=”BuildVersion” type=”uint32” /> +<field name=”Pad” type=”bytes” size=”6” />

    +
    +
    +

    </structure>

    +
    +
    +

    </hob>

    +
    +

    Layouts are packed (no implicit alignment padding), so any padding present in the +C structure must be declared explicitly as a field.

    +

    Definitions are stored by GUID in Cfg.HOB_DEFINITIONS and each one is exposed as a +register whose fields are the structure members (byte offsets converted to bit +positions), published into the platform hierarchy as VID.<definition name>.<structure name>.

    +
    + + +
    +
    +
    +
    + +
    +
    + + + + \ No newline at end of file diff --git a/modules/chipsec.cfg.parsers.iommu_parser.html b/modules/chipsec.cfg.parsers.iommu_parser.html index a53fa3bc..6a1bcf9c 100644 --- a/modules/chipsec.cfg.parsers.iommu_parser.html +++ b/modules/chipsec.cfg.parsers.iommu_parser.html @@ -124,7 +124,7 @@

    Navigation

    diff --git a/modules/chipsec.cfg.parsers.ip.generic.html b/modules/chipsec.cfg.parsers.ip.generic.html index acc4ed04..2151d1f7 100644 --- a/modules/chipsec.cfg.parsers.ip.generic.html +++ b/modules/chipsec.cfg.parsers.ip.generic.html @@ -126,7 +126,7 @@

    Navigation

    diff --git a/modules/chipsec.cfg.parsers.ip.hob.html b/modules/chipsec.cfg.parsers.ip.hob.html new file mode 100644 index 00000000..ce880c50 --- /dev/null +++ b/modules/chipsec.cfg.parsers.ip.hob.html @@ -0,0 +1,133 @@ + + + + + + + + chipsec.cfg.parsers.ip.hob module — CHIPSEC documentation + + + + + + + + + + + + + +
    +
    +
    +
    + +
    +

    chipsec.cfg.parsers.ip.hob module

    +

    HOB (Hand-Off Block) configuration parser.

    +

    This module provides the HOBConfig class describing a <definition> entry of the +top-level <hob> section. The definition names the IP node that holds the HOB +structure declarations pulled in from its config file(s).

    +
    + + +
    +
    +
    +
    + +
    +
    + + + + \ No newline at end of file diff --git a/modules/chipsec.cfg.parsers.ip.html b/modules/chipsec.cfg.parsers.ip.html index ed90ae21..99818975 100644 --- a/modules/chipsec.cfg.parsers.ip.html +++ b/modules/chipsec.cfg.parsers.ip.html @@ -41,6 +41,7 @@

    chipsec.cfg.parsers.ip package diff --git a/modules/chipsec.cfg.parsers.ip.io.html b/modules/chipsec.cfg.parsers.ip.io.html index 0528f397..383d56dc 100644 --- a/modules/chipsec.cfg.parsers.ip.io.html +++ b/modules/chipsec.cfg.parsers.ip.io.html @@ -125,7 +125,7 @@

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    diff --git a/modules/chipsec.cfg.parsers.ip.iobar.html b/modules/chipsec.cfg.parsers.ip.iobar.html index 9130ccd4..d8895540 100644 --- a/modules/chipsec.cfg.parsers.ip.iobar.html +++ b/modules/chipsec.cfg.parsers.ip.iobar.html @@ -125,7 +125,7 @@

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    diff --git a/modules/chipsec.cfg.parsers.ip.memory.html b/modules/chipsec.cfg.parsers.ip.memory.html index 447a8c7e..b1116af4 100644 --- a/modules/chipsec.cfg.parsers.ip.memory.html +++ b/modules/chipsec.cfg.parsers.ip.memory.html @@ -125,7 +125,7 @@

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    diff --git a/modules/chipsec.cfg.parsers.ip.mm_msgbus.html b/modules/chipsec.cfg.parsers.ip.mm_msgbus.html index 72662526..86b39ce4 100644 --- a/modules/chipsec.cfg.parsers.ip.mm_msgbus.html +++ b/modules/chipsec.cfg.parsers.ip.mm_msgbus.html @@ -125,7 +125,7 @@

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    diff --git a/modules/chipsec.cfg.parsers.ip.mmio_bar.html b/modules/chipsec.cfg.parsers.ip.mmio_bar.html index d4615687..5e777f4d 100644 --- a/modules/chipsec.cfg.parsers.ip.mmio_bar.html +++ b/modules/chipsec.cfg.parsers.ip.mmio_bar.html @@ -125,7 +125,7 @@

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    diff --git a/modules/chipsec.cfg.parsers.ip.pci_device.html b/modules/chipsec.cfg.parsers.ip.pci_device.html index 671da27c..67440a59 100644 --- a/modules/chipsec.cfg.parsers.ip.pci_device.html +++ b/modules/chipsec.cfg.parsers.ip.pci_device.html @@ -125,7 +125,7 @@

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    diff --git a/modules/chipsec.cfg.parsers.ip.platform.html b/modules/chipsec.cfg.parsers.ip.platform.html index 44855132..c250483d 100644 --- a/modules/chipsec.cfg.parsers.ip.platform.html +++ b/modules/chipsec.cfg.parsers.ip.platform.html @@ -126,7 +126,7 @@

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    diff --git a/modules/chipsec.cfg.parsers.locks.html b/modules/chipsec.cfg.parsers.locks.html index 6488d81e..079b75d3 100644 --- a/modules/chipsec.cfg.parsers.locks.html +++ b/modules/chipsec.cfg.parsers.locks.html @@ -125,7 +125,7 @@

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    diff --git a/modules/chipsec.cfg.parsers.registers.controls.html b/modules/chipsec.cfg.parsers.registers.controls.html index be63a6a7..fe7bd0a3 100644 --- a/modules/chipsec.cfg.parsers.registers.controls.html +++ b/modules/chipsec.cfg.parsers.registers.controls.html @@ -125,7 +125,7 @@

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    diff --git a/modules/chipsec.cfg.parsers.registers.hob.html b/modules/chipsec.cfg.parsers.registers.hob.html new file mode 100644 index 00000000..356404dc --- /dev/null +++ b/modules/chipsec.cfg.parsers.registers.hob.html @@ -0,0 +1,145 @@ + + + + + + + + chipsec.cfg.parsers.registers.hob module — CHIPSEC documentation + + + + + + + + + + + + + +
    +
    +
    +
    + +
    +

    chipsec.cfg.parsers.registers.hob module

    +

    Register view of a GUID extension HOB payload.

    +

    The payload is held as a single integer so that each structure member declared in +XML becomes a normal register field: its ‘bit’ is the member’s byte offset times +eight and its ‘size’ is the member’s width in bits. This makes the standard field +accessors (get_field / has_field / get_field_mask) work directly on HOB data.

    +
    +
    Two distinct byte orders are involved:
      +

    • The payload is packed into the integer little-endian so that the first byte of +the structure is the least significant one. That is what makes byte offset N +map to bit N*8; it is a container encoding, not an interpretation of the data.

      • +

    • Individual members are reinterpreted using sys.byteorder, because the HOB list +is read from the memory of the machine running CHIPSEC and is therefore stored +in that machine’s native order (matching the ‘=’ prefix used for sizing).

      • +
    +
    +
    +
    + + +
    +
    +
    +
    + +
    +
    + + + + \ No newline at end of file diff --git a/modules/chipsec.cfg.parsers.registers.html b/modules/chipsec.cfg.parsers.registers.html index a094befe..3f1e1056 100644 --- a/modules/chipsec.cfg.parsers.registers.html +++ b/modules/chipsec.cfg.parsers.registers.html @@ -41,6 +41,7 @@

    chipsec.cfg.parsers.registers package diff --git a/modules/chipsec.cfg.parsers.registers.io.html b/modules/chipsec.cfg.parsers.registers.io.html index bfef2cef..abe695f2 100644 --- a/modules/chipsec.cfg.parsers.registers.io.html +++ b/modules/chipsec.cfg.parsers.registers.io.html @@ -125,7 +125,7 @@

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    diff --git a/modules/chipsec.cfg.parsers.registers.iobar.html b/modules/chipsec.cfg.parsers.registers.iobar.html index d60b20d8..c9f8be30 100644 --- a/modules/chipsec.cfg.parsers.registers.iobar.html +++ b/modules/chipsec.cfg.parsers.registers.iobar.html @@ -125,7 +125,7 @@

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