Commit 7aaebf6
[FlyDSL] [CI] FlyDSL FMHA forward-prefill A16W16 kernel for gfx1250 (
* infrastructure for gfx1250 fdsl mha m16x8
* complete qmgr
* draft of kmanager
* save 20260731
* Add VMgr and OMgr and put all mgrs in a dedicated file
* Implement QK GEMM
* draft of softmax
* use permlanex16 in softmax
* draft of pv gemm
* 1st version of working mha
* opt OMgr
* rename test_mha_flydsl_varlen.py -> test_mha_flydsl.py
* modify tests. rename test_mha_flydsl.py and make it support _batch and gqa
* bug fix. no load next kv tile at last iter.
* add attn sink
aaa
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* Fix test issue in THD kernels
* add support to 2-elem window size.
* sched-mode 2. But there is still quality issue in large scale test
* Draft of refactor QMgr for SCHED_MODE=2. There should be no regression.
But there is still quality issue somewhere else. No issue in
SCHED_MODE=0
* Refactor QMgr Part 2
* Greatly fix the quality issue in mode-2. still not perfect.
* use llvm hint to enable SCHED_MODE=2
* remove bug and wa for manual sched_mode=2
* refactor how kmgr and vmgr load data from lds to reg.
* remove unroll of 2 iter of main loop
* skip oob check on middle iterations.
* deferred oaccu rescale
* use imm offset in cluster load
* tree add of softmax sum and max
* fix rebase issue
* m32x8
* Improve softmax tree reduce for m32
* draft of warp specialization
* warp-spec
* Introduce KMgrV2 and VMgrV2 which uses TDM.
* remove wait_dscnt before qk gemm.
* Introduce QMgrV2
* Introduce OMgrV2 and V3
* Add support to qk_hdim=192 and 256. Default to new 8 waves kernel when qk_hdim = 128 and 192 due to better perf.
* clean up and format code
* fix via ruff
* Fix issues raised by reviewdog and Copilot
* fix issue raised by black.
* Fix issues raised by Copliot
* rename files and misc fixes.
* adjust zero_fill and misc fixes.
* fix comments.
* simplify fix of softmax inf issue.
* fix routing logic
* doc fixes.
* Fix issues raised by Copilot
* fix epilogue nan issue
* misc fixes
* add dtype and hdim check on kv tensors
* Add support to fp16
* Fix issues from reviewer
* fixes
* fix issue under gqa > 32
* refine unittest and add comments to old pipeline
* Fix ruff SIM102 and repair LDS helper import after main merge
Ruff flagged SIM102 (collapsible nested if) in _flydsl_serves_thd. Naming
the predicate collapses the nesting without tripping SIM103, which the
plain single-if form would have.
The main merge also silently broke an import: #5116 deleted
aiter/ops/flydsl/utils.py, which this kernel imported
get_shared_memory_per_block from. Git reported no conflict because the
two sides touched different files. Switch to the replacement,
get_lds_capacity_bytes("gfx1250") from aiter.jit.utils.chip_info, which
is the convention the other gfx1250 kernels on main already use and
returns the same 327680 bytes the old fallback did.
Co-Authored-By: Claude <noreply@anthropic.com>
---------
Co-authored-by: Felix Li <felix.li@amd.com>
Co-authored-by: Claude <noreply@anthropic.com>fmha_fwd_prefill_m32x8) (#5168)1 parent 10b192f commit 7aaebf6
12 files changed
Lines changed: 5369 additions & 532 deletions
File tree
- .github/scripts
- aiter
- ops
- flydsl
- kernels/fmha_gfx1250
- op_tests
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