diff --git a/examples/template_configuration/FreeRTOSConfig.h b/examples/template_configuration/FreeRTOSConfig.h index 4a74fe4ca82..58727854d46 100644 --- a/examples/template_configuration/FreeRTOSConfig.h +++ b/examples/template_configuration/FreeRTOSConfig.h @@ -577,7 +577,7 @@ /* Defines the kernel provided implementation of * vApplicationGetIdleTaskMemory() and vApplicationGetTimerTaskMemory() * to provide the memory that is used by the Idle task and Timer task - * respectively. The application can provide it's own implementation of + * respectively. The application can provide its own implementation of * vApplicationGetIdleTaskMemory() and vApplicationGetTimerTaskMemory() by * setting configKERNEL_PROVIDED_STATIC_MEMORY to 0 or leaving it undefined. */ #define configKERNEL_PROVIDED_STATIC_MEMORY 1 diff --git a/include/croutine.h b/include/croutine.h index a5e2e4462da..616553669ad 100644 --- a/include/croutine.h +++ b/include/croutine.h @@ -528,7 +528,7 @@ void vCoRoutineSchedule( void ); * functions used by tasks. * * crQUEUE_SEND_FROM_ISR() and crQUEUE_RECEIVE_FROM_ISR() can only be used to - * pass data between a co-routine and and ISR, whereas xQueueSendFromISR() and + * pass data between a co-routine and ISR, whereas xQueueSendFromISR() and * xQueueReceiveFromISR() can only be used to pass data between a task and and * ISR. * @@ -628,7 +628,7 @@ void vCoRoutineSchedule( void ); * functions used by tasks. * * crQUEUE_SEND_FROM_ISR() and crQUEUE_RECEIVE_FROM_ISR() can only be used to - * pass data between a co-routine and and ISR, whereas xQueueSendFromISR() and + * pass data between a co-routine and ISR, whereas xQueueSendFromISR() and * xQueueReceiveFromISR() can only be used to pass data between a task and and * ISR. * diff --git a/include/list.h b/include/list.h index f9a8c00f60a..1c0232369e1 100644 --- a/include/list.h +++ b/include/list.h @@ -31,7 +31,7 @@ * heavily for the schedulers needs, it is also available for use by * application code. * - * list_ts can only store pointers to list_item_ts. Each ListItem_t contains a + * List_t can only store pointers to ListItem_t. Each ListItem_t contains a * numeric value (xItemValue). Most of the time the lists are sorted in * ascending item value order. * @@ -42,7 +42,7 @@ * is because the tail contains a wrap back pointer to the true head of * the list. * - * In addition to it's value, each list item contains a pointer to the next + * In addition to its value, each list item contains a pointer to the next * item in the list (pxNext), a pointer to the list it is in (pxContainer) * and a pointer back to the object that contains it. These later two * pointers are included for efficiency of list manipulation. There is @@ -74,7 +74,7 @@ * compiler's options were set for maximum optimisation has been inspected and * deemed to be as intended. That said, as compiler technology advances, and * especially if aggressive cross module optimisation is used (a use case that - * has not been exercised to any great extend) then it is feasible that the + * has not been exercised to any great extent) then it is feasible that the * volatile qualifier will be needed for correct optimisation. It is expected * that a compiler removing essential code because, without the volatile * qualifier on the list structure members and with aggressive cross module @@ -219,7 +219,7 @@ typedef struct xLIST * Access macro to retrieve the value of the list item at the head of a given * list. * - * \page listGET_LIST_ITEM_VALUE listGET_LIST_ITEM_VALUE + * \page listGET_ITEM_VALUE_OF_HEAD_ENTRY listGET_ITEM_VALUE_OF_HEAD_ENTRY * \ingroup LinkedList */ #define listGET_ITEM_VALUE_OF_HEAD_ENTRY( pxList ) ( ( ( pxList )->xListEnd ).pxNext->xItemValue ) diff --git a/include/queue.h b/include/queue.h index e3dbbefd2f5..90d185c3d96 100644 --- a/include/queue.h +++ b/include/queue.h @@ -44,7 +44,7 @@ /** * Type by which queues are referenced. For example, a call to xQueueCreate() - * returns an QueueHandle_t variable that can then be used as a parameter to + * returns a QueueHandle_t variable that can then be used as a parameter to * xQueueSend(), xQueueReceive(), etc. */ struct QueueDefinition; /* Using old naming convention so as not to break kernel aware debuggers. */ @@ -60,7 +60,7 @@ typedef struct QueueDefinition * QueueSetHandle_t; /** * Queue sets can contain both queues and semaphores, so the * QueueSetMemberHandle_t is defined as a type to be used where a parameter or - * return value can be either an QueueHandle_t or an SemaphoreHandle_t. + * return value can be either a QueueHandle_t or a SemaphoreHandle_t. */ typedef struct QueueDefinition * QueueSetMemberHandle_t; @@ -185,7 +185,7 @@ typedef struct QueueDefinition * QueueSetMemberHandle_t; * @param pucQueueStorage If uxItemSize is not zero then * pucQueueStorage must point to a uint8_t array that is at least large * enough to hold the maximum number of items that can be in the queue at any - * one time - which is ( uxQueueLength * uxItemsSize ) bytes. If uxItemSize is + * one time - which is ( uxQueueLength * uxItemSize ) bytes. If uxItemSize is * zero then pucQueueStorage can be NULL. * * @param pxQueueBuffer Must point to a variable of type StaticQueue_t, which @@ -604,7 +604,7 @@ typedef struct QueueDefinition * QueueSetMemberHandle_t; * BaseType_t xQueueGenericSend( * QueueHandle_t xQueue, * const void * pvItemToQueue, - * TickType_t xTicksToWait + * TickType_t xTicksToWait, * BaseType_t xCopyPosition * ); * @endcode @@ -1189,7 +1189,7 @@ void vQueueDelete( QueueHandle_t xQueue ) PRIVILEGED_FUNCTION; * * // ... * - * if( xHigherPrioritytaskWoken == pdTRUE ) + * if( xHigherPriorityTaskWoken == pdTRUE ) * { * // Writing to the queue caused a task to unblock and the unblocked task * // has a priority higher than or equal to the priority of the currently @@ -1451,7 +1451,7 @@ BaseType_t xQueueGiveFromISR( QueueHandle_t xQueue, * // task will be woken. * } * - * if( xHigherPrioritytaskWoken == pdTRUE ); + * if( xHigherPriorityTaskWoken == pdTRUE ) * { * // As xHigherPriorityTaskWoken is now set to pdTRUE then a context * // switch should be requested. The macro used is port specific and @@ -1664,7 +1664,7 @@ BaseType_t xQueueGiveMutexRecursive( QueueHandle_t xMutex ) PRIVILEGED_FUNCTION; * Note 2: Blocking on a queue set that contains a mutex will not cause the * mutex holder to inherit the priority of the blocked task. * - * Note 3: An additional 4 bytes of RAM is required for each space in a every + * Note 3: An additional 4 bytes of RAM is required for each space in every * queue added to a queue set. Therefore counting semaphores that have a high * maximum count value should not be added to a queue set. * @@ -1716,7 +1716,7 @@ BaseType_t xQueueGiveMutexRecursive( QueueHandle_t xMutex ) PRIVILEGED_FUNCTION; * Note 2: Blocking on a queue set that contains a mutex will not cause the * mutex holder to inherit the priority of the blocked task. * - * Note 3: An additional 4 bytes of RAM is required for each space in a every + * Note 3: An additional 4 bytes of RAM is required for each space in every * queue added to a queue set. Therefore counting semaphores that have a high * maximum count value should not be added to a queue set. * @@ -1767,7 +1767,7 @@ BaseType_t xQueueGiveMutexRecursive( QueueHandle_t xMutex ) PRIVILEGED_FUNCTION; * a call to xQueueSelectFromSet() has first returned a handle to that set member. * * @param xQueueOrSemaphore The handle of the queue or semaphore being added to - * the queue set (cast to an QueueSetMemberHandle_t type). + * the queue set (cast to a QueueSetMemberHandle_t type). * * @param xQueueSet The handle of the queue set to which the queue or semaphore * is being added. @@ -1790,7 +1790,7 @@ BaseType_t xQueueGiveMutexRecursive( QueueHandle_t xMutex ) PRIVILEGED_FUNCTION; * function. * * @param xQueueOrSemaphore The handle of the queue or semaphore being removed - * from the queue set (cast to an QueueSetMemberHandle_t type). + * from the queue set (cast to a QueueSetMemberHandle_t type). * * @param xQueueSet The handle of the queue set in which the queue or semaphore * is included. @@ -1836,7 +1836,7 @@ BaseType_t xQueueGiveMutexRecursive( QueueHandle_t xMutex ) PRIVILEGED_FUNCTION; * a QueueSetMemberHandle_t type) contained in the queue set that contains data, * or the handle of a semaphore (cast to a QueueSetMemberHandle_t type) contained * in the queue set that is available, or NULL if no such queue or semaphore - * exists before before the specified block time expires. + * exists before the specified block time expires. */ #if ( configUSE_QUEUE_SETS == 1 ) QueueSetMemberHandle_t xQueueSelectFromSet( QueueSetHandle_t xQueueSet, diff --git a/include/task.h b/include/task.h index 679b6fceaec..d137bbe8e81 100644 --- a/include/task.h +++ b/include/task.h @@ -89,7 +89,7 @@ * task. h * * Type by which tasks are referenced. For example, a call to xTaskCreate - * returns (via a pointer parameter) an TaskHandle_t variable that can then + * returns (via a pointer parameter) a TaskHandle_t variable that can then * be used as a parameter to vTaskDelete to delete the task. * * \defgroup TaskHandle_t TaskHandle_t @@ -579,7 +579,7 @@ typedef enum * * Example usage: * @code{c} - * // Create an TaskParameters_t structure that defines the task to be created. + * // Create a TaskParameters_t structure that defines the task to be created. * static const TaskParameters_t xCheckTaskParameters = * { * vATask, // pvTaskCode - the function that implements the task. @@ -677,7 +677,7 @@ typedef enum * * Example usage: * @code{c} - * // Create an TaskParameters_t structure that defines the task to be created. + * // Create a TaskParameters_t structure that defines the task to be created. * // The StaticTask_t variable is only included in the structure when * // configSUPPORT_STATIC_ALLOCATION is set to 1. The PRIVILEGED_DATA macro can * // be used to force the variable into the RTOS kernel's privileged data area. @@ -1038,7 +1038,7 @@ BaseType_t xTaskDelayUntil( TickType_t * const pxPreviousWakeTime, * // it itself. * if( uxTaskPriorityGet( xHandle ) != tskIDLE_PRIORITY ) * { - * // The task has changed it's priority. + * // The task has changed its priority. * } * * // ... @@ -2120,7 +2120,7 @@ char * pcTaskGetName( TaskHandle_t xTaskToQuery ) PRIVILEGED_FUNCTION; * configUSE_TRACE_FACILITY must be defined as 1 in FreeRTOSConfig.h for * uxTaskGetSystemState() to be available. * - * uxTaskGetSystemState() populates an TaskStatus_t structure for each task in + * uxTaskGetSystemState() populates a TaskStatus_t structure for each task in * the system. TaskStatus_t structures contain, among other things, members * for the task handle, task name, task priority, task state, and total amount * of run time consumed by the task. See the TaskStatus_t structure @@ -3270,7 +3270,7 @@ uint32_t ulTaskGenericNotifyTake( UBaseType_t uxIndexToWaitOn, /** * task. h * @code{c} - * BaseType_t xTaskNotifyStateClearIndexed( TaskHandle_t xTask, UBaseType_t uxIndexToCLear ); + * BaseType_t xTaskNotifyStateClearIndexed( TaskHandle_t xTask, UBaseType_t uxIndexToClear ); * * BaseType_t xTaskNotifyStateClear( TaskHandle_t xTask ); * @endcode diff --git a/portable/ARMv8M/non_secure/portable/GCC/ARM_CM23/portasm.c b/portable/ARMv8M/non_secure/portable/GCC/ARM_CM23/portasm.c index b584c63e755..bd16547597d 100644 --- a/portable/ARMv8M/non_secure/portable/GCC/ARM_CM23/portasm.c +++ b/portable/ARMv8M/non_secure/portable/GCC/ARM_CM23/portasm.c @@ -126,9 +126,9 @@ " restore_general_regs_first_task: \n" " subs r2, #32 \n" " ldmia r2!, {r4-r7} \n" /* r4-r7 contain half of the hardware saved context. */ - " stmia r3!, {r4-r7} \n" /* Copy half of the the hardware saved context on the task stack. */ + " stmia r3!, {r4-r7} \n" /* Copy half of the hardware saved context on the task stack. */ " ldmia r2!, {r4-r7} \n" /* r4-r7 contain rest half of the hardware saved context. */ - " stmia r3!, {r4-r7} \n" /* Copy rest half of the the hardware saved context on the task stack. */ + " stmia r3!, {r4-r7} \n" /* Copy rest half of the hardware saved context on the task stack. */ " subs r2, #48 \n" " ldmia r2!, {r4-r7} \n" /* Restore r8-r11. */ " mov r8, r4 \n" /* r8 = r4. */ @@ -402,9 +402,9 @@ void vClearInterruptMask( __attribute__( ( unused ) ) uint32_t ulMask ) /* __att " restore_general_regs: \n" " subs r2, #32 \n" " ldmia r2!, {r4-r7} \n" /* r4-r7 contain half of the hardware saved context. */ - " stmia r3!, {r4-r7} \n" /* Copy half of the the hardware saved context on the task stack. */ + " stmia r3!, {r4-r7} \n" /* Copy half of the hardware saved context on the task stack. */ " ldmia r2!, {r4-r7} \n" /* r4-r7 contain rest half of the hardware saved context. */ - " stmia r3!, {r4-r7} \n" /* Copy rest half of the the hardware saved context on the task stack. */ + " stmia r3!, {r4-r7} \n" /* Copy rest half of the hardware saved context on the task stack. */ " subs r2, #48 \n" " ldmia r2!, {r4-r7} \n" /* Restore r8-r11. */ " mov r8, r4 \n" /* r8 = r4. */ diff --git a/portable/ARMv8M/non_secure/portable/GCC/ARM_CM23_NTZ/portasm.c b/portable/ARMv8M/non_secure/portable/GCC/ARM_CM23_NTZ/portasm.c index d215f8f732d..718119aad48 100644 --- a/portable/ARMv8M/non_secure/portable/GCC/ARM_CM23_NTZ/portasm.c +++ b/portable/ARMv8M/non_secure/portable/GCC/ARM_CM23_NTZ/portasm.c @@ -121,9 +121,9 @@ " restore_general_regs_first_task: \n" " subs r1, #32 \n" " ldmia r1!, {r4-r7} \n" /* r4-r7 contain half of the hardware saved context. */ - " stmia r2!, {r4-r7} \n" /* Copy half of the the hardware saved context on the task stack. */ + " stmia r2!, {r4-r7} \n" /* Copy half of the hardware saved context on the task stack. */ " ldmia r1!, {r4-r7} \n" /* r4-r7 contain rest half of the hardware saved context. */ - " stmia r2!, {r4-r7} \n" /* Copy rest half of the the hardware saved context on the task stack. */ + " stmia r2!, {r4-r7} \n" /* Copy rest half of the hardware saved context on the task stack. */ " subs r1, #48 \n" " ldmia r1!, {r4-r7} \n" /* Restore r8-r11. */ " mov r8, r4 \n" /* r8 = r4. */ @@ -375,9 +375,9 @@ void vClearInterruptMask( __attribute__( ( unused ) ) uint32_t ulMask ) /* __att " restore_general_regs: \n" " subs r1, #32 \n" " ldmia r1!, {r4-r7} \n" /* r4-r7 contain half of the hardware saved context. */ - " stmia r2!, {r4-r7} \n" /* Copy half of the the hardware saved context on the task stack. */ + " stmia r2!, {r4-r7} \n" /* Copy half of the hardware saved context on the task stack. */ " ldmia r1!, {r4-r7} \n" /* r4-r7 contain rest half of the hardware saved context. */ - " stmia r2!, {r4-r7} \n" /* Copy rest half of the the hardware saved context on the task stack. */ + " stmia r2!, {r4-r7} \n" /* Copy rest half of the hardware saved context on the task stack. */ " subs r1, #48 \n" " ldmia r1!, {r4-r7} \n" /* Restore r8-r11. */ " mov r8, r4 \n" /* r8 = r4. */ diff --git a/portable/ARMv8M/secure/context/secure_context.c b/portable/ARMv8M/secure/context/secure_context.c index a91e5e8916a..a7e13734d52 100644 --- a/portable/ARMv8M/secure/context/secure_context.c +++ b/portable/ARMv8M/secure/context/secure_context.c @@ -349,7 +349,7 @@ secureportNON_SECURE_CALLABLE void SecureContext_SaveContext( SecureContextHandl secureportREAD_PSPLIM( pucStackLimit ); - /* Ensure that task's context is loaded and the task is saving it's own + /* Ensure that task's context is loaded and the task is saving its own * context. */ if( ( xSecureContexts[ ulSecureContextIndex ].pucStackLimit == pucStackLimit ) && ( xSecureContexts[ ulSecureContextIndex ].pvTaskHandle == pvTaskHandle ) ) diff --git a/portable/CodeWarrior/HCS12/port.c b/portable/CodeWarrior/HCS12/port.c index 2d564cd66fa..fbff071ea8a 100644 --- a/portable/CodeWarrior/HCS12/port.c +++ b/portable/CodeWarrior/HCS12/port.c @@ -63,7 +63,7 @@ scheduler startup function. */ /* Calls to portENTER_CRITICAL() can be nested. When they are nested the critical section should not be left (i.e. interrupts should not be re-enabled) until the nesting depth reaches 0. This variable simply tracks the nesting -depth. Each task maintains it's own critical nesting depth variable so +depth. Each task maintains its own critical nesting depth variable so uxCriticalNesting is saved and restored from the task stack during a context switch. */ volatile UBaseType_t uxCriticalNesting = 0xff; diff --git a/portable/GCC/ARM_CM0/port.c b/portable/GCC/ARM_CM0/port.c index fd3229a76ae..a4f95779637 100644 --- a/portable/GCC/ARM_CM0/port.c +++ b/portable/GCC/ARM_CM0/port.c @@ -689,7 +689,7 @@ static void prvTaskExitError( void ) } /* Shift the code by one before returning so it can be written directly - * into the the correct bit position of the attribute register. */ + * into the correct bit position of the attribute register. */ return( ulReturnValue << 1UL ); } diff --git a/portable/GCC/ARM_CM0/portasm.c b/portable/GCC/ARM_CM0/portasm.c index 179a715466e..4896f654d5a 100644 --- a/portable/GCC/ARM_CM0/portasm.c +++ b/portable/GCC/ARM_CM0/portasm.c @@ -111,9 +111,9 @@ " restore_general_regs_first_task: \n" " subs r1, #32 \n" " ldmia r1!, {r4-r7} \n" /* r4-r7 contain half of the hardware saved context. */ - " stmia r2!, {r4-r7} \n" /* Copy half of the the hardware saved context on the task stack. */ + " stmia r2!, {r4-r7} \n" /* Copy half of the hardware saved context on the task stack. */ " ldmia r1!, {r4-r7} \n" /* r4-r7 contain rest half of the hardware saved context. */ - " stmia r2!, {r4-r7} \n" /* Copy rest half of the the hardware saved context on the task stack. */ + " stmia r2!, {r4-r7} \n" /* Copy rest half of the hardware saved context on the task stack. */ " subs r1, #48 \n" " ldmia r1!, {r4-r7} \n" /* Restore r8-r11. */ " mov r8, r4 \n" /* r8 = r4. */ @@ -366,9 +366,9 @@ void vClearInterruptMask( __attribute__( ( unused ) ) uint32_t ulMask ) /* __att " restore_general_regs: \n" " subs r1, #32 \n" " ldmia r1!, {r4-r7} \n" /* r4-r7 contain half of the hardware saved context. */ - " stmia r2!, {r4-r7} \n" /* Copy half of the the hardware saved context on the task stack. */ + " stmia r2!, {r4-r7} \n" /* Copy half of the hardware saved context on the task stack. */ " ldmia r1!, {r4-r7} \n" /* r4-r7 contain rest half of the hardware saved context. */ - " stmia r2!, {r4-r7} \n" /* Copy rest half of the the hardware saved context on the task stack. */ + " stmia r2!, {r4-r7} \n" /* Copy rest half of the hardware saved context on the task stack. */ " subs r1, #48 \n" " ldmia r1!, {r4-r7} \n" /* Restore r8-r11. */ " mov r8, r4 \n" /* r8 = r4. */ diff --git a/portable/GCC/ARM_CM23/non_secure/portasm.c b/portable/GCC/ARM_CM23/non_secure/portasm.c index b584c63e755..bd16547597d 100644 --- a/portable/GCC/ARM_CM23/non_secure/portasm.c +++ b/portable/GCC/ARM_CM23/non_secure/portasm.c @@ -126,9 +126,9 @@ " restore_general_regs_first_task: \n" " subs r2, #32 \n" " ldmia r2!, {r4-r7} \n" /* r4-r7 contain half of the hardware saved context. */ - " stmia r3!, {r4-r7} \n" /* Copy half of the the hardware saved context on the task stack. */ + " stmia r3!, {r4-r7} \n" /* Copy half of the hardware saved context on the task stack. */ " ldmia r2!, {r4-r7} \n" /* r4-r7 contain rest half of the hardware saved context. */ - " stmia r3!, {r4-r7} \n" /* Copy rest half of the the hardware saved context on the task stack. */ + " stmia r3!, {r4-r7} \n" /* Copy rest half of the hardware saved context on the task stack. */ " subs r2, #48 \n" " ldmia r2!, {r4-r7} \n" /* Restore r8-r11. */ " mov r8, r4 \n" /* r8 = r4. */ @@ -402,9 +402,9 @@ void vClearInterruptMask( __attribute__( ( unused ) ) uint32_t ulMask ) /* __att " restore_general_regs: \n" " subs r2, #32 \n" " ldmia r2!, {r4-r7} \n" /* r4-r7 contain half of the hardware saved context. */ - " stmia r3!, {r4-r7} \n" /* Copy half of the the hardware saved context on the task stack. */ + " stmia r3!, {r4-r7} \n" /* Copy half of the hardware saved context on the task stack. */ " ldmia r2!, {r4-r7} \n" /* r4-r7 contain rest half of the hardware saved context. */ - " stmia r3!, {r4-r7} \n" /* Copy rest half of the the hardware saved context on the task stack. */ + " stmia r3!, {r4-r7} \n" /* Copy rest half of the hardware saved context on the task stack. */ " subs r2, #48 \n" " ldmia r2!, {r4-r7} \n" /* Restore r8-r11. */ " mov r8, r4 \n" /* r8 = r4. */ diff --git a/portable/GCC/ARM_CM23/secure/secure_context.c b/portable/GCC/ARM_CM23/secure/secure_context.c index a91e5e8916a..a7e13734d52 100644 --- a/portable/GCC/ARM_CM23/secure/secure_context.c +++ b/portable/GCC/ARM_CM23/secure/secure_context.c @@ -349,7 +349,7 @@ secureportNON_SECURE_CALLABLE void SecureContext_SaveContext( SecureContextHandl secureportREAD_PSPLIM( pucStackLimit ); - /* Ensure that task's context is loaded and the task is saving it's own + /* Ensure that task's context is loaded and the task is saving its own * context. */ if( ( xSecureContexts[ ulSecureContextIndex ].pucStackLimit == pucStackLimit ) && ( xSecureContexts[ ulSecureContextIndex ].pvTaskHandle == pvTaskHandle ) ) diff --git a/portable/GCC/ARM_CM23_NTZ/non_secure/portasm.c b/portable/GCC/ARM_CM23_NTZ/non_secure/portasm.c index d215f8f732d..718119aad48 100644 --- a/portable/GCC/ARM_CM23_NTZ/non_secure/portasm.c +++ b/portable/GCC/ARM_CM23_NTZ/non_secure/portasm.c @@ -121,9 +121,9 @@ " restore_general_regs_first_task: \n" " subs r1, #32 \n" " ldmia r1!, {r4-r7} \n" /* r4-r7 contain half of the hardware saved context. */ - " stmia r2!, {r4-r7} \n" /* Copy half of the the hardware saved context on the task stack. */ + " stmia r2!, {r4-r7} \n" /* Copy half of the hardware saved context on the task stack. */ " ldmia r1!, {r4-r7} \n" /* r4-r7 contain rest half of the hardware saved context. */ - " stmia r2!, {r4-r7} \n" /* Copy rest half of the the hardware saved context on the task stack. */ + " stmia r2!, {r4-r7} \n" /* Copy rest half of the hardware saved context on the task stack. */ " subs r1, #48 \n" " ldmia r1!, {r4-r7} \n" /* Restore r8-r11. */ " mov r8, r4 \n" /* r8 = r4. */ @@ -375,9 +375,9 @@ void vClearInterruptMask( __attribute__( ( unused ) ) uint32_t ulMask ) /* __att " restore_general_regs: \n" " subs r1, #32 \n" " ldmia r1!, {r4-r7} \n" /* r4-r7 contain half of the hardware saved context. */ - " stmia r2!, {r4-r7} \n" /* Copy half of the the hardware saved context on the task stack. */ + " stmia r2!, {r4-r7} \n" /* Copy half of the hardware saved context on the task stack. */ " ldmia r1!, {r4-r7} \n" /* r4-r7 contain rest half of the hardware saved context. */ - " stmia r2!, {r4-r7} \n" /* Copy rest half of the the hardware saved context on the task stack. */ + " stmia r2!, {r4-r7} \n" /* Copy rest half of the hardware saved context on the task stack. */ " subs r1, #48 \n" " ldmia r1!, {r4-r7} \n" /* Restore r8-r11. */ " mov r8, r4 \n" /* r8 = r4. */ diff --git a/portable/GCC/ARM_CM33/secure/secure_context.c b/portable/GCC/ARM_CM33/secure/secure_context.c index a91e5e8916a..a7e13734d52 100644 --- a/portable/GCC/ARM_CM33/secure/secure_context.c +++ b/portable/GCC/ARM_CM33/secure/secure_context.c @@ -349,7 +349,7 @@ secureportNON_SECURE_CALLABLE void SecureContext_SaveContext( SecureContextHandl secureportREAD_PSPLIM( pucStackLimit ); - /* Ensure that task's context is loaded and the task is saving it's own + /* Ensure that task's context is loaded and the task is saving its own * context. */ if( ( xSecureContexts[ ulSecureContextIndex ].pucStackLimit == pucStackLimit ) && ( xSecureContexts[ ulSecureContextIndex ].pvTaskHandle == pvTaskHandle ) ) diff --git a/portable/GCC/ARM_CM35P/secure/secure_context.c b/portable/GCC/ARM_CM35P/secure/secure_context.c index a91e5e8916a..a7e13734d52 100644 --- a/portable/GCC/ARM_CM35P/secure/secure_context.c +++ b/portable/GCC/ARM_CM35P/secure/secure_context.c @@ -349,7 +349,7 @@ secureportNON_SECURE_CALLABLE void SecureContext_SaveContext( SecureContextHandl secureportREAD_PSPLIM( pucStackLimit ); - /* Ensure that task's context is loaded and the task is saving it's own + /* Ensure that task's context is loaded and the task is saving its own * context. */ if( ( xSecureContexts[ ulSecureContextIndex ].pucStackLimit == pucStackLimit ) && ( xSecureContexts[ ulSecureContextIndex ].pvTaskHandle == pvTaskHandle ) ) diff --git a/portable/GCC/ARM_CM3_MPU/port.c b/portable/GCC/ARM_CM3_MPU/port.c index c8d3439b646..96d781d969d 100644 --- a/portable/GCC/ARM_CM3_MPU/port.c +++ b/portable/GCC/ARM_CM3_MPU/port.c @@ -1206,7 +1206,7 @@ static uint32_t prvGetMPURegionSizeSetting( uint32_t ulActualSizeInBytes ) } /* Shift the code by one before returning so it can be written directly - * into the the correct bit position of the attribute register. */ + * into the correct bit position of the attribute register. */ return( ulReturnValue << 1UL ); } /*-----------------------------------------------------------*/ diff --git a/portable/GCC/ARM_CM4_MPU/port.c b/portable/GCC/ARM_CM4_MPU/port.c index 5a35271577e..146798c0ff7 100644 --- a/portable/GCC/ARM_CM4_MPU/port.c +++ b/portable/GCC/ARM_CM4_MPU/port.c @@ -1350,7 +1350,7 @@ static uint32_t prvGetMPURegionSizeSetting( uint32_t ulActualSizeInBytes ) } /* Shift the code by one before returning so it can be written directly - * into the the correct bit position of the attribute register. */ + * into the correct bit position of the attribute register. */ return( ulReturnValue << 1UL ); } /*-----------------------------------------------------------*/ diff --git a/portable/GCC/ARM_CM52/secure/secure_context.c b/portable/GCC/ARM_CM52/secure/secure_context.c index a91e5e8916a..a7e13734d52 100644 --- a/portable/GCC/ARM_CM52/secure/secure_context.c +++ b/portable/GCC/ARM_CM52/secure/secure_context.c @@ -349,7 +349,7 @@ secureportNON_SECURE_CALLABLE void SecureContext_SaveContext( SecureContextHandl secureportREAD_PSPLIM( pucStackLimit ); - /* Ensure that task's context is loaded and the task is saving it's own + /* Ensure that task's context is loaded and the task is saving its own * context. */ if( ( xSecureContexts[ ulSecureContextIndex ].pucStackLimit == pucStackLimit ) && ( xSecureContexts[ ulSecureContextIndex ].pvTaskHandle == pvTaskHandle ) ) diff --git a/portable/GCC/ARM_CM55/secure/secure_context.c b/portable/GCC/ARM_CM55/secure/secure_context.c index a91e5e8916a..a7e13734d52 100644 --- a/portable/GCC/ARM_CM55/secure/secure_context.c +++ b/portable/GCC/ARM_CM55/secure/secure_context.c @@ -349,7 +349,7 @@ secureportNON_SECURE_CALLABLE void SecureContext_SaveContext( SecureContextHandl secureportREAD_PSPLIM( pucStackLimit ); - /* Ensure that task's context is loaded and the task is saving it's own + /* Ensure that task's context is loaded and the task is saving its own * context. */ if( ( xSecureContexts[ ulSecureContextIndex ].pucStackLimit == pucStackLimit ) && ( xSecureContexts[ ulSecureContextIndex ].pvTaskHandle == pvTaskHandle ) ) diff --git a/portable/GCC/ARM_CM85/secure/secure_context.c b/portable/GCC/ARM_CM85/secure/secure_context.c index a91e5e8916a..a7e13734d52 100644 --- a/portable/GCC/ARM_CM85/secure/secure_context.c +++ b/portable/GCC/ARM_CM85/secure/secure_context.c @@ -349,7 +349,7 @@ secureportNON_SECURE_CALLABLE void SecureContext_SaveContext( SecureContextHandl secureportREAD_PSPLIM( pucStackLimit ); - /* Ensure that task's context is loaded and the task is saving it's own + /* Ensure that task's context is loaded and the task is saving its own * context. */ if( ( xSecureContexts[ ulSecureContextIndex ].pucStackLimit == pucStackLimit ) && ( xSecureContexts[ ulSecureContextIndex ].pvTaskHandle == pvTaskHandle ) ) diff --git a/portable/GCC/ARM_CRx_MPU/port.c b/portable/GCC/ARM_CRx_MPU/port.c index 56ff38384f9..f21ea49ae3b 100644 --- a/portable/GCC/ARM_CRx_MPU/port.c +++ b/portable/GCC/ARM_CRx_MPU/port.c @@ -489,7 +489,7 @@ static uint32_t prvGetMPURegionSizeEncoding( uint32_t ulActualMPURegionSize ) } /* Shift the code by one before returning so it can be written directly - * into the the correct bit position of the attribute register. */ + * into the correct bit position of the attribute register. */ return ulReturnValue << 1UL; } diff --git a/portable/GCC/ARM_STAR_MC3/secure/secure_context.c b/portable/GCC/ARM_STAR_MC3/secure/secure_context.c index a91e5e8916a..a7e13734d52 100644 --- a/portable/GCC/ARM_STAR_MC3/secure/secure_context.c +++ b/portable/GCC/ARM_STAR_MC3/secure/secure_context.c @@ -349,7 +349,7 @@ secureportNON_SECURE_CALLABLE void SecureContext_SaveContext( SecureContextHandl secureportREAD_PSPLIM( pucStackLimit ); - /* Ensure that task's context is loaded and the task is saving it's own + /* Ensure that task's context is loaded and the task is saving its own * context. */ if( ( xSecureContexts[ ulSecureContextIndex ].pucStackLimit == pucStackLimit ) && ( xSecureContexts[ ulSecureContextIndex ].pvTaskHandle == pvTaskHandle ) ) diff --git a/portable/GCC/HCS12/port.c b/portable/GCC/HCS12/port.c index 4355a3f11d3..77c03801ca0 100644 --- a/portable/GCC/HCS12/port.c +++ b/portable/GCC/HCS12/port.c @@ -64,7 +64,7 @@ BaseType_t ATTR_NEAR xStartSchedulerNear( void ); /* Calls to portENTER_CRITICAL() can be nested. When they are nested the * critical section should not be left (i.e. interrupts should not be re-enabled) * until the nesting depth reaches 0. This variable simply tracks the nesting - * depth. Each task maintains it's own critical nesting depth variable so + * depth. Each task maintains its own critical nesting depth variable so * uxCriticalNesting is saved and restored from the task stack during a context * switch. */ volatile UBaseType_t uxCriticalNesting = 0x80; /* un-initialized */ diff --git a/portable/GCC/MicroBlaze/port.c b/portable/GCC/MicroBlaze/port.c index fb8b410be01..7b987949a7c 100644 --- a/portable/GCC/MicroBlaze/port.c +++ b/portable/GCC/MicroBlaze/port.c @@ -63,7 +63,7 @@ #define portISR_STACK_FILL_VALUE 0x55555555 /* Counts the nesting depth of calls to portENTER_CRITICAL(). Each task - * maintains it's own count, so this variable is saved as part of the task + * maintains its own count, so this variable is saved as part of the task * context. */ volatile UBaseType_t uxCriticalNesting = portINITIAL_NESTING_VALUE; @@ -235,7 +235,7 @@ void vPortYield( void ) /* Perform the context switch in a critical section to assure it is * not interrupted by the tick ISR. It is not a problem to do this as - * each task maintains it's own interrupt status. */ + * each task maintains its own interrupt status. */ portENTER_CRITICAL(); /* Jump directly to the yield function to ensure there is no diff --git a/portable/GCC/MicroBlazeV8/portmacro.h b/portable/GCC/MicroBlazeV8/portmacro.h index d23214ea420..e8e0f36863e 100644 --- a/portable/GCC/MicroBlazeV8/portmacro.h +++ b/portable/GCC/MicroBlazeV8/portmacro.h @@ -322,7 +322,7 @@ void vApplicationSetupTimerInterrupt( void ); /* * This is an application defined callback function used to clear whichever - * interrupt was installed by the the vApplicationSetupTimerInterrupt() callback + * interrupt was installed by the vApplicationSetupTimerInterrupt() callback * function - in this case the interrupt generated by the AXI timer. It is * provided as an application callback because the kernel will run on lots of * different MicroBlaze and FPGA configurations - not all of which will have the diff --git a/portable/GCC/MicroBlazeV9/portmacro.h b/portable/GCC/MicroBlazeV9/portmacro.h index 1fb9c825962..c3556f94cce 100644 --- a/portable/GCC/MicroBlazeV9/portmacro.h +++ b/portable/GCC/MicroBlazeV9/portmacro.h @@ -337,7 +337,7 @@ void vApplicationSetupTimerInterrupt( void ); /* * This is an application defined callback function used to clear whichever - * interrupt was installed by the the vApplicationSetupTimerInterrupt() callback + * interrupt was installed by the vApplicationSetupTimerInterrupt() callback * function - in this case the interrupt generated by the AXI timer. It is * provided as an application callback because the kernel will run on lots of * different MicroBlaze and FPGA configurations - not all of which will have the diff --git a/portable/GCC/RISC-V/chip_specific_extensions/Pulpino_Vega_RV32M1RM/freertos_risc_v_chip_specific_extensions.h b/portable/GCC/RISC-V/chip_specific_extensions/Pulpino_Vega_RV32M1RM/freertos_risc_v_chip_specific_extensions.h index 4d8a5fb537e..25c1b7fba71 100644 --- a/portable/GCC/RISC-V/chip_specific_extensions/Pulpino_Vega_RV32M1RM/freertos_risc_v_chip_specific_extensions.h +++ b/portable/GCC/RISC-V/chip_specific_extensions/Pulpino_Vega_RV32M1RM/freertos_risc_v_chip_specific_extensions.h @@ -27,7 +27,7 @@ */ /* - * The FreeRTOS kernel's RISC-V port is split between the the code that is + * The FreeRTOS kernel's RISC-V port is split between the code that is * common across all currently supported RISC-V chips (implementations of the * RISC-V ISA), and code that tailors the port to a specific RISC-V chip: * diff --git a/portable/GCC/RISC-V/chip_specific_extensions/RISCV_MTIME_CLINT_no_extensions/freertos_risc_v_chip_specific_extensions.h b/portable/GCC/RISC-V/chip_specific_extensions/RISCV_MTIME_CLINT_no_extensions/freertos_risc_v_chip_specific_extensions.h index 3be456cb447..a9599395de4 100644 --- a/portable/GCC/RISC-V/chip_specific_extensions/RISCV_MTIME_CLINT_no_extensions/freertos_risc_v_chip_specific_extensions.h +++ b/portable/GCC/RISC-V/chip_specific_extensions/RISCV_MTIME_CLINT_no_extensions/freertos_risc_v_chip_specific_extensions.h @@ -27,7 +27,7 @@ */ /* - * The FreeRTOS kernel's RISC-V port is split between the the code that is + * The FreeRTOS kernel's RISC-V port is split between the code that is * common across all currently supported RISC-V chips (implementations of the * RISC-V ISA), and code that tailors the port to a specific RISC-V chip: * diff --git a/portable/GCC/RISC-V/chip_specific_extensions/RISCV_no_extensions/freertos_risc_v_chip_specific_extensions.h b/portable/GCC/RISC-V/chip_specific_extensions/RISCV_no_extensions/freertos_risc_v_chip_specific_extensions.h index 9f93824bdfc..a55d66a9496 100644 --- a/portable/GCC/RISC-V/chip_specific_extensions/RISCV_no_extensions/freertos_risc_v_chip_specific_extensions.h +++ b/portable/GCC/RISC-V/chip_specific_extensions/RISCV_no_extensions/freertos_risc_v_chip_specific_extensions.h @@ -27,7 +27,7 @@ */ /* - * The FreeRTOS kernel's RISC-V port is split between the the code that is + * The FreeRTOS kernel's RISC-V port is split between the code that is * common across all currently supported RISC-V chips (implementations of the * RISC-V ISA), and code that tailors the port to a specific RISC-V chip: * diff --git a/portable/GCC/RISC-V/chip_specific_extensions/RV32I_CLINT_no_extensions/freertos_risc_v_chip_specific_extensions.h b/portable/GCC/RISC-V/chip_specific_extensions/RV32I_CLINT_no_extensions/freertos_risc_v_chip_specific_extensions.h index 5b9ef4c06a7..f738a6a3d05 100644 --- a/portable/GCC/RISC-V/chip_specific_extensions/RV32I_CLINT_no_extensions/freertos_risc_v_chip_specific_extensions.h +++ b/portable/GCC/RISC-V/chip_specific_extensions/RV32I_CLINT_no_extensions/freertos_risc_v_chip_specific_extensions.h @@ -27,7 +27,7 @@ */ /* - * The FreeRTOS kernel's RISC-V port is split between the the code that is + * The FreeRTOS kernel's RISC-V port is split between the code that is * common across all currently supported RISC-V chips (implementations of the * RISC-V ISA), and code that tailors the port to a specific RISC-V chip: * diff --git a/portable/IAR/ARM_CM23/secure/secure_context.c b/portable/IAR/ARM_CM23/secure/secure_context.c index a91e5e8916a..a7e13734d52 100644 --- a/portable/IAR/ARM_CM23/secure/secure_context.c +++ b/portable/IAR/ARM_CM23/secure/secure_context.c @@ -349,7 +349,7 @@ secureportNON_SECURE_CALLABLE void SecureContext_SaveContext( SecureContextHandl secureportREAD_PSPLIM( pucStackLimit ); - /* Ensure that task's context is loaded and the task is saving it's own + /* Ensure that task's context is loaded and the task is saving its own * context. */ if( ( xSecureContexts[ ulSecureContextIndex ].pucStackLimit == pucStackLimit ) && ( xSecureContexts[ ulSecureContextIndex ].pvTaskHandle == pvTaskHandle ) ) diff --git a/portable/IAR/ARM_CM33/secure/secure_context.c b/portable/IAR/ARM_CM33/secure/secure_context.c index a91e5e8916a..a7e13734d52 100644 --- a/portable/IAR/ARM_CM33/secure/secure_context.c +++ b/portable/IAR/ARM_CM33/secure/secure_context.c @@ -349,7 +349,7 @@ secureportNON_SECURE_CALLABLE void SecureContext_SaveContext( SecureContextHandl secureportREAD_PSPLIM( pucStackLimit ); - /* Ensure that task's context is loaded and the task is saving it's own + /* Ensure that task's context is loaded and the task is saving its own * context. */ if( ( xSecureContexts[ ulSecureContextIndex ].pucStackLimit == pucStackLimit ) && ( xSecureContexts[ ulSecureContextIndex ].pvTaskHandle == pvTaskHandle ) ) diff --git a/portable/IAR/ARM_CM35P/secure/secure_context.c b/portable/IAR/ARM_CM35P/secure/secure_context.c index a91e5e8916a..a7e13734d52 100644 --- a/portable/IAR/ARM_CM35P/secure/secure_context.c +++ b/portable/IAR/ARM_CM35P/secure/secure_context.c @@ -349,7 +349,7 @@ secureportNON_SECURE_CALLABLE void SecureContext_SaveContext( SecureContextHandl secureportREAD_PSPLIM( pucStackLimit ); - /* Ensure that task's context is loaded and the task is saving it's own + /* Ensure that task's context is loaded and the task is saving its own * context. */ if( ( xSecureContexts[ ulSecureContextIndex ].pucStackLimit == pucStackLimit ) && ( xSecureContexts[ ulSecureContextIndex ].pvTaskHandle == pvTaskHandle ) ) diff --git a/portable/IAR/ARM_CM4F_MPU/port.c b/portable/IAR/ARM_CM4F_MPU/port.c index 0441e0f0c68..423d0a777cc 100644 --- a/portable/IAR/ARM_CM4F_MPU/port.c +++ b/portable/IAR/ARM_CM4F_MPU/port.c @@ -1139,7 +1139,7 @@ static uint32_t prvGetMPURegionSizeSetting( uint32_t ulActualSizeInBytes ) } /* Shift the code by one before returning so it can be written directly - * into the the correct bit position of the attribute register. */ + * into the correct bit position of the attribute register. */ return( ulReturnValue << 1UL ); } /*-----------------------------------------------------------*/ diff --git a/portable/IAR/ARM_CM52/secure/secure_context.c b/portable/IAR/ARM_CM52/secure/secure_context.c index a91e5e8916a..a7e13734d52 100644 --- a/portable/IAR/ARM_CM52/secure/secure_context.c +++ b/portable/IAR/ARM_CM52/secure/secure_context.c @@ -349,7 +349,7 @@ secureportNON_SECURE_CALLABLE void SecureContext_SaveContext( SecureContextHandl secureportREAD_PSPLIM( pucStackLimit ); - /* Ensure that task's context is loaded and the task is saving it's own + /* Ensure that task's context is loaded and the task is saving its own * context. */ if( ( xSecureContexts[ ulSecureContextIndex ].pucStackLimit == pucStackLimit ) && ( xSecureContexts[ ulSecureContextIndex ].pvTaskHandle == pvTaskHandle ) ) diff --git a/portable/IAR/ARM_CM55/secure/secure_context.c b/portable/IAR/ARM_CM55/secure/secure_context.c index a91e5e8916a..a7e13734d52 100644 --- a/portable/IAR/ARM_CM55/secure/secure_context.c +++ b/portable/IAR/ARM_CM55/secure/secure_context.c @@ -349,7 +349,7 @@ secureportNON_SECURE_CALLABLE void SecureContext_SaveContext( SecureContextHandl secureportREAD_PSPLIM( pucStackLimit ); - /* Ensure that task's context is loaded and the task is saving it's own + /* Ensure that task's context is loaded and the task is saving its own * context. */ if( ( xSecureContexts[ ulSecureContextIndex ].pucStackLimit == pucStackLimit ) && ( xSecureContexts[ ulSecureContextIndex ].pvTaskHandle == pvTaskHandle ) ) diff --git a/portable/IAR/ARM_CM85/secure/secure_context.c b/portable/IAR/ARM_CM85/secure/secure_context.c index a91e5e8916a..a7e13734d52 100644 --- a/portable/IAR/ARM_CM85/secure/secure_context.c +++ b/portable/IAR/ARM_CM85/secure/secure_context.c @@ -349,7 +349,7 @@ secureportNON_SECURE_CALLABLE void SecureContext_SaveContext( SecureContextHandl secureportREAD_PSPLIM( pucStackLimit ); - /* Ensure that task's context is loaded and the task is saving it's own + /* Ensure that task's context is loaded and the task is saving its own * context. */ if( ( xSecureContexts[ ulSecureContextIndex ].pucStackLimit == pucStackLimit ) && ( xSecureContexts[ ulSecureContextIndex ].pvTaskHandle == pvTaskHandle ) ) diff --git a/portable/IAR/ARM_STAR_MC3/secure/secure_context.c b/portable/IAR/ARM_STAR_MC3/secure/secure_context.c index a91e5e8916a..a7e13734d52 100644 --- a/portable/IAR/ARM_STAR_MC3/secure/secure_context.c +++ b/portable/IAR/ARM_STAR_MC3/secure/secure_context.c @@ -349,7 +349,7 @@ secureportNON_SECURE_CALLABLE void SecureContext_SaveContext( SecureContextHandl secureportREAD_PSPLIM( pucStackLimit ); - /* Ensure that task's context is loaded and the task is saving it's own + /* Ensure that task's context is loaded and the task is saving its own * context. */ if( ( xSecureContexts[ ulSecureContextIndex ].pucStackLimit == pucStackLimit ) && ( xSecureContexts[ ulSecureContextIndex ].pvTaskHandle == pvTaskHandle ) ) diff --git a/portable/IAR/RISC-V/chip_specific_extensions/RV32I_CLINT_no_extensions/freertos_risc_v_chip_specific_extensions.h b/portable/IAR/RISC-V/chip_specific_extensions/RV32I_CLINT_no_extensions/freertos_risc_v_chip_specific_extensions.h index 364fd577364..49c6479f001 100644 --- a/portable/IAR/RISC-V/chip_specific_extensions/RV32I_CLINT_no_extensions/freertos_risc_v_chip_specific_extensions.h +++ b/portable/IAR/RISC-V/chip_specific_extensions/RV32I_CLINT_no_extensions/freertos_risc_v_chip_specific_extensions.h @@ -27,7 +27,7 @@ */ /* - * The FreeRTOS kernel's RISC-V port is split between the the code that is + * The FreeRTOS kernel's RISC-V port is split between the code that is * common across all currently supported RISC-V chips (implementations of the * RISC-V ISA), and code that tailors the port to a specific RISC-V chip: * diff --git a/portable/MPLAB/PIC32MEC14xx/ISR_Support.h b/portable/MPLAB/PIC32MEC14xx/ISR_Support.h index ce7c4ad631b..ad6c91487da 100644 --- a/portable/MPLAB/PIC32MEC14xx/ISR_Support.h +++ b/portable/MPLAB/PIC32MEC14xx/ISR_Support.h @@ -78,7 +78,7 @@ la k0, uxInterruptNesting lw s6, (k0) - /* If the nesting count is 0 then swap to the the system stack, otherwise + /* If the nesting count is 0 then swap to the system stack, otherwise the system stack is already being used. */ bne s6, zero, 1f nop diff --git a/portable/MPLAB/PIC32MX/ISR_Support.h b/portable/MPLAB/PIC32MX/ISR_Support.h index 0bff08fe141..b92838895e2 100644 --- a/portable/MPLAB/PIC32MX/ISR_Support.h +++ b/portable/MPLAB/PIC32MX/ISR_Support.h @@ -60,7 +60,7 @@ la k0, uxInterruptNesting lw s6, (k0) - /* If the nesting count is 0 then swap to the the system stack, otherwise + /* If the nesting count is 0 then swap to the system stack, otherwise the system stack is already being used. */ bne s6, zero, 1f nop diff --git a/portable/MPLAB/PIC32MZ/ISR_Support.h b/portable/MPLAB/PIC32MZ/ISR_Support.h index 292877f4268..396e345a09e 100644 --- a/portable/MPLAB/PIC32MZ/ISR_Support.h +++ b/portable/MPLAB/PIC32MZ/ISR_Support.h @@ -174,7 +174,7 @@ la k0, uxInterruptNesting lw s6, (k0) - /* If the nesting count is 0 then swap to the the system stack, otherwise + /* If the nesting count is 0 then swap to the system stack, otherwise the system stack is already being used. */ bne s6, zero, 1f nop diff --git a/portable/RVDS/ARM_CM4_MPU/port.c b/portable/RVDS/ARM_CM4_MPU/port.c index 8620325ca6c..77c497a9b92 100644 --- a/portable/RVDS/ARM_CM4_MPU/port.c +++ b/portable/RVDS/ARM_CM4_MPU/port.c @@ -1351,7 +1351,7 @@ static uint32_t prvGetMPURegionSizeSetting( uint32_t ulActualSizeInBytes ) } /* Shift the code by one before returning so it can be written directly - * into the the correct bit position of the attribute register. */ + * into the correct bit position of the attribute register. */ return( ulReturnValue << 1UL ); } /*-----------------------------------------------------------*/ diff --git a/stream_buffer.c b/stream_buffer.c index a4c6d268d11..57ac1be064e 100644 --- a/stream_buffer.c +++ b/stream_buffer.c @@ -272,7 +272,7 @@ static BaseType_t prvBytesInBufferMeetTriggerLevel( const StreamBuffer_t * const * the length and data bytes are written in two separate chunks, and we don't want * the reader to see the buffer as having grown until after all data is copied over. * This function takes a custom xHead value to indicate where to write to (necessary - * for chaining) and returns the the resulting xHead position. + * for chaining) and returns the resulting xHead position. * To mark the write as complete, manually set the buffer's xHead field with the * returned xHead from this function. */ @@ -314,7 +314,7 @@ static size_t prvWriteMessageToBuffer( StreamBuffer_t * const pxStreamBuffer, * the writer to see the buffer as having more free space until after all data is * copied over, especially if we have to abort the read due to insufficient receiving space. * This function takes a custom xTail value to indicate where to read from (necessary - * for chaining) and returns the the resulting xTail position. + * for chaining) and returns the resulting xTail position. * To mark the read as complete, manually set the buffer's xTail field with the * returned xTail from this function. */ diff --git a/tasks.c b/tasks.c index e1171292758..1e95d8cebba 100644 --- a/tasks.c +++ b/tasks.c @@ -8800,7 +8800,7 @@ STATIC void prvAddCurrentTaskToDelayedList( TickType_t xTicksToWait, * This is the kernel provided implementation of vApplicationGetIdleTaskMemory() * to provide the memory that is used by the Idle task. It is used when * configKERNEL_PROVIDED_STATIC_MEMORY is set to 1. The application can provide - * it's own implementation of vApplicationGetIdleTaskMemory by setting + * its own implementation of vApplicationGetIdleTaskMemory by setting * configKERNEL_PROVIDED_STATIC_MEMORY to 0 or leaving it undefined. */ void vApplicationGetIdleTaskMemory( StaticTask_t ** ppxIdleTaskTCBBuffer, @@ -8841,7 +8841,7 @@ STATIC void prvAddCurrentTaskToDelayedList( TickType_t xTicksToWait, * This is the kernel provided implementation of vApplicationGetTimerTaskMemory() * to provide the memory that is used by the Timer service task. It is used when * configKERNEL_PROVIDED_STATIC_MEMORY is set to 1. The application can provide - * it's own implementation of vApplicationGetTimerTaskMemory by setting + * its own implementation of vApplicationGetTimerTaskMemory by setting * configKERNEL_PROVIDED_STATIC_MEMORY to 0 or leaving it undefined. */ void vApplicationGetTimerTaskMemory( StaticTask_t ** ppxTimerTaskTCBBuffer,